# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs -o - %s | FileCheck %s --- name: s16_trunc_v2s16_buildvector tracksRegLiveness: true body: | bb.0: liveins: $vgpr0, $vgpr1 ; CHECK-LABEL: name: s16_trunc_v2s16_buildvector ; CHECK: liveins: $vgpr0, $vgpr1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 42 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[TRUNC]], [[C]] ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) ; CHECK-NEXT: $vgpr0 = COPY [[ZEXT]](s32) %0:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr1 %2:_(s16) = G_TRUNC %0 %3:_(s16) = G_TRUNC %1 %4:_(<2 x s16>) = G_BUILD_VECTOR %2, %3 %5:_(s32) = G_BITCAST %4 %6:_(s16) = G_TRUNC %5 %7:_(s16) = G_CONSTANT i16 42 %8:_(s16) = G_OR %7, %6 %9:_(s32) = G_ZEXT %8 $vgpr0 = COPY %9 ... --- name: s16_trunc_v2s16_buildvector_shift8_nofold tracksRegLiveness: true body: | bb.0: liveins: $vgpr0, $vgpr1 ; CHECK-LABEL: name: s16_trunc_v2s16_buildvector_shift8_nofold ; CHECK: liveins: $vgpr0, $vgpr1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16) ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[BUILD_VECTOR]](<2 x s16>) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 42 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[TRUNC2]], [[C1]] ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) ; CHECK-NEXT: $vgpr0 = COPY [[ZEXT]](s32) %0:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr1 %2:_(s16) = G_TRUNC %0 %3:_(s16) = G_TRUNC %1 %4:_(<2 x s16>) = G_BUILD_VECTOR %2, %3 %5:_(s32) = G_BITCAST %4 %6:_(s32) = G_CONSTANT i32 8 %7:_(s32) = G_LSHR %5, %6 %8:_(s16) = G_TRUNC %7 %9:_(s16) = G_CONSTANT i16 42 %10:_(s16) = G_OR %9, %8 %11:_(s32) = G_ZEXT %10 $vgpr0 = COPY %11 ... --- name: s16_trunc_v2s16_buildvector_shift16 tracksRegLiveness: true body: | bb.0: liveins: $vgpr0, $vgpr1 ; CHECK-LABEL: name: s16_trunc_v2s16_buildvector_shift16 ; CHECK: liveins: $vgpr0, $vgpr1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr1 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 42 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[TRUNC]], [[C]] ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) ; CHECK-NEXT: $vgpr0 = COPY [[ZEXT]](s32) %0:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr1 %2:_(s16) = G_TRUNC %0 %3:_(s16) = G_TRUNC %1 %4:_(<2 x s16>) = G_BUILD_VECTOR %2, %3 %5:_(s32) = G_BITCAST %4 %6:_(s32) = G_CONSTANT i32 16 %7:_(s32) = G_LSHR %5, %6 %8:_(s16) = G_TRUNC %7 %9:_(s16) = G_CONSTANT i16 42 %10:_(s16) = G_OR %9, %8 %11:_(s32) = G_ZEXT %10 $vgpr0 = COPY %11 ... --- name: s16_trunc_v2s32_buildvector_nofold tracksRegLiveness: true body: | bb.0: liveins: $vgpr0, $vgpr1 ; CHECK-LABEL: name: s16_trunc_v2s32_buildvector_nofold ; CHECK: liveins: $vgpr0, $vgpr1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32) ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s64) = G_BITCAST [[BUILD_VECTOR]](<2 x s32>) ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s64) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 42 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[TRUNC]], [[C]] ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) ; CHECK-NEXT: $vgpr0 = COPY [[ZEXT]](s32) %0:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr1 %2:_(<2 x s32>) = G_BUILD_VECTOR %0, %1 %3:_(s64) = G_BITCAST %2 %4:_(s16) = G_TRUNC %3 %5:_(s16) = G_CONSTANT i16 42 %6:_(s16) = G_OR %5, %4 %7:_(s32) = G_ZEXT %6 $vgpr0 = COPY %7 ... --- name: s32_trunc_v2s32_buildvector tracksRegLiveness: true body: | bb.0: liveins: $vgpr0, $vgpr1 ; CHECK-LABEL: name: s32_trunc_v2s32_buildvector ; CHECK: liveins: $vgpr0, $vgpr1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32) %0:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr1 %2:_(<2 x s32>) = G_BUILD_VECTOR %0, %1 %3:_(s64) = G_BITCAST %2 %4:_(s32) = G_TRUNC %3 $vgpr0 = COPY %4 ... --- name: s32_trunc_v2s32_buildvector_multiple_users tracksRegLiveness: true body: | bb.0: liveins: $vgpr0, $vgpr1 ; CHECK-LABEL: name: s32_trunc_v2s32_buildvector_multiple_users ; CHECK: liveins: $vgpr0, $vgpr1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32) ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s64) = G_BITCAST [[BUILD_VECTOR]](<2 x s32>) ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<2 x s32>), [[COPY1]](s32) ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32) ; CHECK-NEXT: $vgpr1 = COPY [[EVEC]](s32) ; CHECK-NEXT: $vgpr2_vgpr3 = COPY [[BITCAST]](s64) %0:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr1 %2:_(<2 x s32>) = G_BUILD_VECTOR %0, %1 %3:_(s64) = G_BITCAST %2 %4:_(s32) = G_TRUNC %3 %5:_(s32) = G_EXTRACT_VECTOR_ELT %2, %1 $vgpr0 = COPY %4 $vgpr1 = COPY %5 $vgpr2_vgpr3 = COPY %3 ...