# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=instruction-select \
# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select \
# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s

---
name:            fpext
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $f10_f

    ; CHECK-LABEL: name: fpext
    ; CHECK: liveins: $f10_f
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
    ; CHECK-NEXT: [[FCVT_D_S:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_S [[COPY]], 0
    ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_S]]
    ; CHECK-NEXT: PseudoRET implicit $f10_d
    %0:fprb(s32) = COPY $f10_f
    %1:fprb(s64) = G_FPEXT %0(s32)
    $f10_d = COPY %1(s64)
    PseudoRET implicit $f10_d

...
---
name:            fptrunc
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $f10_d

    ; CHECK-LABEL: name: fptrunc
    ; CHECK: liveins: $f10_d
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
    ; CHECK-NEXT: [[FCVT_S_D:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_D [[COPY]], 7
    ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_D]]
    ; CHECK-NEXT: PseudoRET implicit $f10_f
    %0:fprb(s64) = COPY $f10_d
    %1:fprb(s32) = G_FPTRUNC %0(s64)
    $f10_f = COPY %1(s32)
    PseudoRET implicit $f10_f

...