; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 ; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32 ; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64 define @vaaddu_vv_nxv8i8_floor( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i8_floor: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: csrwi vxrm, 2 ; CHECK-NEXT: vaaddu.vv v8, v8, v9 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i16 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vx_nxv8i8_floor( %x, i8 %y) { ; CHECK-LABEL: vaaddu_vx_nxv8i8_floor: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, ma ; CHECK-NEXT: csrwi vxrm, 2 ; CHECK-NEXT: vaaddu.vx v8, v8, a0 ; CHECK-NEXT: ret %xzv = zext %x to %yhead = insertelement poison, i8 %y, i32 0 %ysplat = shufflevector %yhead, poison, zeroinitializer %yzv = zext %ysplat to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i16 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i8_floor_sexti16( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i8_floor_sexti16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vwadd.vv v10, v8, v9 ; CHECK-NEXT: vnsrl.wi v8, v10, 1 ; CHECK-NEXT: ret %xzv = sext %x to %yzv = sext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i16 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i8_floor_zexti32( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i8_floor_zexti32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: csrwi vxrm, 2 ; CHECK-NEXT: vaaddu.vv v8, v8, v9 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i32 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i8_floor_lshr2( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i8_floor_lshr2: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vwaddu.vv v10, v8, v9 ; CHECK-NEXT: vnsrl.wi v8, v10, 2 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i16 2, i32 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i16_floor( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i16_floor: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: csrwi vxrm, 2 ; CHECK-NEXT: vaaddu.vv v8, v8, v10 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i32 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vx_nxv8i16_floor( %x, i16 %y) { ; CHECK-LABEL: vaaddu_vx_nxv8i16_floor: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, ma ; CHECK-NEXT: csrwi vxrm, 2 ; CHECK-NEXT: vaaddu.vx v8, v8, a0 ; CHECK-NEXT: ret %xzv = zext %x to %yhead = insertelement poison, i16 %y, i16 0 %ysplat = shufflevector %yhead, poison, zeroinitializer %yzv = zext %ysplat to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i32 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i32_floor( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i32_floor: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: csrwi vxrm, 2 ; CHECK-NEXT: vaaddu.vv v8, v8, v12 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i64 1, i64 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vx_nxv8i32_floor( %x, i32 %y) { ; CHECK-LABEL: vaaddu_vx_nxv8i32_floor: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma ; CHECK-NEXT: csrwi vxrm, 2 ; CHECK-NEXT: vaaddu.vx v8, v8, a0 ; CHECK-NEXT: ret %xzv = zext %x to %yhead = insertelement poison, i32 %y, i32 0 %ysplat = shufflevector %yhead, poison, zeroinitializer %yzv = zext %ysplat to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i64 1, i64 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i64_floor( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i64_floor: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: csrwi vxrm, 2 ; CHECK-NEXT: vaaddu.vv v8, v8, v16 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i128 1, i128 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vx_nxv8i64_floor( %x, i64 %y) { ; RV32-LABEL: vaaddu_vx_nxv8i64_floor: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma ; RV32-NEXT: vlse64.v v16, (a0), zero ; RV32-NEXT: csrwi vxrm, 2 ; RV32-NEXT: vaaddu.vv v8, v8, v16 ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vaaddu_vx_nxv8i64_floor: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, ma ; RV64-NEXT: csrwi vxrm, 2 ; RV64-NEXT: vaaddu.vx v8, v8, a0 ; RV64-NEXT: ret %xzv = zext %x to %yhead = insertelement poison, i64 %y, i64 0 %ysplat = shufflevector %yhead, poison, zeroinitializer %yzv = zext %ysplat to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i128 1, i128 0 %splat = shufflevector %one, poison, zeroinitializer %div = lshr %add, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i8_ceil( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i8_ceil: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: csrwi vxrm, 0 ; CHECK-NEXT: vaaddu.vv v8, v8, v9 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i16 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret } define @vaaddu_vx_nxv8i8_ceil( %x, i8 %y) { ; CHECK-LABEL: vaaddu_vx_nxv8i8_ceil: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, ma ; CHECK-NEXT: csrwi vxrm, 0 ; CHECK-NEXT: vaaddu.vx v8, v8, a0 ; CHECK-NEXT: ret %xzv = zext %x to %yhead = insertelement poison, i8 %y, i32 0 %ysplat = shufflevector %yhead, poison, zeroinitializer %yzv = zext %ysplat to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i16 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i8_ceil_sexti16( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i8_ceil_sexti16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vwadd.vv v10, v8, v9 ; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; CHECK-NEXT: vadd.vi v10, v10, 1 ; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma ; CHECK-NEXT: vnsrl.wi v8, v10, 1 ; CHECK-NEXT: ret %xzv = sext %x to %yzv = sext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i16 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i8_ceil_zexti32( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i8_ceil_zexti32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: csrwi vxrm, 0 ; CHECK-NEXT: vaaddu.vv v8, v8, v9 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i32 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i8_ceil_lshr2( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i8_ceil_lshr2: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vwaddu.vv v10, v8, v9 ; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; CHECK-NEXT: vadd.vi v10, v10, 2 ; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma ; CHECK-NEXT: vnsrl.wi v8, v10, 2 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i16 2, i32 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i8_ceil_add2( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i8_ceil_add2: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vwaddu.vv v10, v8, v9 ; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; CHECK-NEXT: vadd.vi v10, v10, 2 ; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma ; CHECK-NEXT: vnsrl.wi v8, v10, 2 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i16 2, i32 0 %splat1 = shufflevector %one, poison, zeroinitializer %two = insertelement poison, i16 2, i32 0 %splat2 = shufflevector %two, poison, zeroinitializer %add2 = add nuw nsw %add, %splat2 %div = lshr %add2, %splat1 %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i16_ceil( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i16_ceil: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: csrwi vxrm, 0 ; CHECK-NEXT: vaaddu.vv v8, v8, v10 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i32 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret } define @vaaddu_vx_nxv8i16_ceil( %x, i16 %y) { ; CHECK-LABEL: vaaddu_vx_nxv8i16_ceil: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, ma ; CHECK-NEXT: csrwi vxrm, 0 ; CHECK-NEXT: vaaddu.vx v8, v8, a0 ; CHECK-NEXT: ret %xzv = zext %x to %yhead = insertelement poison, i16 %y, i16 0 %ysplat = shufflevector %yhead, poison, zeroinitializer %yzv = zext %ysplat to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i32 1, i32 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i32_ceil( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i32_ceil: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: csrwi vxrm, 0 ; CHECK-NEXT: vaaddu.vv v8, v8, v12 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i64 1, i64 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret } define @vaaddu_vx_nxv8i32_ceil( %x, i32 %y) { ; CHECK-LABEL: vaaddu_vx_nxv8i32_ceil: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma ; CHECK-NEXT: csrwi vxrm, 0 ; CHECK-NEXT: vaaddu.vx v8, v8, a0 ; CHECK-NEXT: ret %xzv = zext %x to %yhead = insertelement poison, i32 %y, i32 0 %ysplat = shufflevector %yhead, poison, zeroinitializer %yzv = zext %ysplat to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i64 1, i64 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret } define @vaaddu_vv_nxv8i64_ceil( %x, %y) { ; CHECK-LABEL: vaaddu_vv_nxv8i64_ceil: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: csrwi vxrm, 0 ; CHECK-NEXT: vaaddu.vv v8, v8, v16 ; CHECK-NEXT: ret %xzv = zext %x to %yzv = zext %y to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i128 1, i128 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret } define @vaaddu_vx_nxv8i64_ceil( %x, i64 %y) { ; RV32-LABEL: vaaddu_vx_nxv8i64_ceil: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma ; RV32-NEXT: vlse64.v v16, (a0), zero ; RV32-NEXT: csrwi vxrm, 0 ; RV32-NEXT: vaaddu.vv v8, v8, v16 ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vaaddu_vx_nxv8i64_ceil: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, ma ; RV64-NEXT: csrwi vxrm, 0 ; RV64-NEXT: vaaddu.vx v8, v8, a0 ; RV64-NEXT: ret %xzv = zext %x to %yhead = insertelement poison, i64 %y, i64 0 %ysplat = shufflevector %yhead, poison, zeroinitializer %yzv = zext %ysplat to %add = add nuw nsw %xzv, %yzv %one = insertelement poison, i128 1, i128 0 %splat = shufflevector %one, poison, zeroinitializer %add1 = add nuw nsw %add, %splat %div = lshr %add1, %splat %ret = trunc %div to ret %ret }