; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \ ; RUN: | FileCheck %s --check-prefixes=CHECK,RV32 ; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \ ; RUN: | FileCheck %s --check-prefixes=CHECK,RV64 declare @llvm.vp.sdiv.nxv8i7(, , , i32) define @vdiv_vx_nxv8i7( %a, i7 signext %b, %mask, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv8i7: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a2, zero, e8, m1, ta, ma ; CHECK-NEXT: vadd.vv v8, v8, v8 ; CHECK-NEXT: vsra.vi v8, v8, 1 ; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i7 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i7( %a, %vb, %mask, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv1i8(, , , i32) define @vdiv_vv_nxv1i8( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv1i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv1i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv1i8_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv1i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv1i8( %va, i8 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv1i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i8( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv1i8_unmasked( %va, i8 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv1i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i8( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv2i8(, , , i32) define @vdiv_vv_nxv2i8( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv2i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv2i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv2i8_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv2i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv2i8( %va, i8 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv2i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i8( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv2i8_unmasked( %va, i8 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv2i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i8( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv3i8(, , , i32) define @vdiv_vv_nxv3i8( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv3i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv3i8( %va, %b, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv4i8(, , , i32) define @vdiv_vv_nxv4i8( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv4i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv4i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv4i8_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv4i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv4i8( %va, i8 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv4i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i8( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv4i8_unmasked( %va, i8 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv4i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i8( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv8i8(, , , i32) define @vdiv_vv_nxv8i8( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv8i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv8i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv8i8_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv8i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv8i8( %va, i8 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv8i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i8( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv8i8_unmasked( %va, i8 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv8i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i8( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv16i8(, , , i32) define @vdiv_vv_nxv16i8( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv16i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v10, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv16i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv16i8_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv16i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v10 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv16i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv16i8( %va, i8 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv16i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv16i8( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv16i8_unmasked( %va, i8 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv16i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv16i8( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv32i8(, , , i32) define @vdiv_vv_nxv32i8( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv32i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v12, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv32i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv32i8_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv32i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v12 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv32i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv32i8( %va, i8 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv32i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv32i8( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv32i8_unmasked( %va, i8 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv32i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv32i8( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv64i8(, , , i32) define @vdiv_vv_nxv64i8( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv64i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v16, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv64i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv64i8_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv64i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v16 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv64i8( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv64i8( %va, i8 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv64i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv64i8( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv64i8_unmasked( %va, i8 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv64i8_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv64i8( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv1i16(, , , i32) define @vdiv_vv_nxv1i16( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv1i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv1i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv1i16_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv1i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv1i16( %va, i16 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv1i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i16( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv1i16_unmasked( %va, i16 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv1i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i16( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv2i16(, , , i32) define @vdiv_vv_nxv2i16( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv2i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv2i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv2i16_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv2i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv2i16( %va, i16 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv2i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i16( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv2i16_unmasked( %va, i16 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv2i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i16( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv4i16(, , , i32) define @vdiv_vv_nxv4i16( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv4i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv4i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv4i16_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv4i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv4i16( %va, i16 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv4i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i16( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv4i16_unmasked( %va, i16 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv4i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i16( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv8i16(, , , i32) define @vdiv_vv_nxv8i16( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv8i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v10, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv8i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv8i16_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv8i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v10 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv8i16( %va, i16 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv8i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i16( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv8i16_unmasked( %va, i16 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv8i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i16( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv16i16(, , , i32) define @vdiv_vv_nxv16i16( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv16i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v12, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv16i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv16i16_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv16i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v12 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv16i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv16i16( %va, i16 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv16i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv16i16( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv16i16_unmasked( %va, i16 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv16i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv16i16( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv32i16(, , , i32) define @vdiv_vv_nxv32i16( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv32i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v16, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv32i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv32i16_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv32i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v16 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv32i16( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv32i16( %va, i16 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv32i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv32i16( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv32i16_unmasked( %va, i16 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv32i16_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv32i16( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv1i32(, , , i32) define @vdiv_vv_nxv1i32( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv1i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv1i32( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv1i32_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv1i32_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i32( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv1i32( %va, i32 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv1i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i32( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv1i32_unmasked( %va, i32 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv1i32_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i32( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv2i32(, , , i32) define @vdiv_vv_nxv2i32( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv2i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv2i32( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv2i32_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv2i32_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i32( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv2i32( %va, i32 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv2i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i32( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv2i32_unmasked( %va, i32 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv2i32_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i32( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv4i32(, , , i32) define @vdiv_vv_nxv4i32( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv4i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v10, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv4i32( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv4i32_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv4i32_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v10 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i32( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv4i32( %va, i32 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv4i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i32( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv4i32_unmasked( %va, i32 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv4i32_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i32( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv8i32(, , , i32) define @vdiv_vv_nxv8i32( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv8i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v12, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv8i32( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv8i32_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv8i32_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v12 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i32( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv8i32( %va, i32 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv8i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i32( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv8i32_unmasked( %va, i32 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv8i32_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i32( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv16i32(, , , i32) define @vdiv_vv_nxv16i32( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv16i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v16, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv16i32( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv16i32_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv16i32_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v16 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv16i32( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv16i32( %va, i32 %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv16i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv16i32( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv16i32_unmasked( %va, i32 %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vx_nxv16i32_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma ; CHECK-NEXT: vdiv.vx v8, v8, a0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv16i32( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv1i64(, , , i32) define @vdiv_vv_nxv1i64( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv1i64( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv1i64_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv1i64_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i64( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv1i64( %va, i64 %b, %m, i32 zeroext %evl) { ; RV32-LABEL: vdiv_vx_nxv1i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m1, ta, ma ; RV32-NEXT: vlse64.v v9, (a0), zero ; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma ; RV32-NEXT: vdiv.vv v8, v8, v9, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vdiv_vx_nxv1i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma ; RV64-NEXT: vdiv.vx v8, v8, a0, v0.t ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i64( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv1i64_unmasked( %va, i64 %b, i32 zeroext %evl) { ; RV32-LABEL: vdiv_vx_nxv1i64_unmasked: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m1, ta, ma ; RV32-NEXT: vlse64.v v9, (a0), zero ; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma ; RV32-NEXT: vdiv.vv v8, v8, v9 ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vdiv_vx_nxv1i64_unmasked: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma ; RV64-NEXT: vdiv.vx v8, v8, a0 ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv1i64( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv2i64(, , , i32) define @vdiv_vv_nxv2i64( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v10, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv2i64( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv2i64_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv2i64_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v10 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i64( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv2i64( %va, i64 %b, %m, i32 zeroext %evl) { ; RV32-LABEL: vdiv_vx_nxv2i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m2, ta, ma ; RV32-NEXT: vlse64.v v10, (a0), zero ; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma ; RV32-NEXT: vdiv.vv v8, v8, v10, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vdiv_vx_nxv2i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma ; RV64-NEXT: vdiv.vx v8, v8, a0, v0.t ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i64( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv2i64_unmasked( %va, i64 %b, i32 zeroext %evl) { ; RV32-LABEL: vdiv_vx_nxv2i64_unmasked: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m2, ta, ma ; RV32-NEXT: vlse64.v v10, (a0), zero ; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma ; RV32-NEXT: vdiv.vv v8, v8, v10 ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vdiv_vx_nxv2i64_unmasked: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma ; RV64-NEXT: vdiv.vx v8, v8, a0 ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv2i64( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv4i64(, , , i32) define @vdiv_vv_nxv4i64( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v12, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv4i64( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv4i64_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv4i64_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v12 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i64( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv4i64( %va, i64 %b, %m, i32 zeroext %evl) { ; RV32-LABEL: vdiv_vx_nxv4i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m4, ta, ma ; RV32-NEXT: vlse64.v v12, (a0), zero ; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma ; RV32-NEXT: vdiv.vv v8, v8, v12, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vdiv_vx_nxv4i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma ; RV64-NEXT: vdiv.vx v8, v8, a0, v0.t ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i64( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv4i64_unmasked( %va, i64 %b, i32 zeroext %evl) { ; RV32-LABEL: vdiv_vx_nxv4i64_unmasked: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m4, ta, ma ; RV32-NEXT: vlse64.v v12, (a0), zero ; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma ; RV32-NEXT: vdiv.vv v8, v8, v12 ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vdiv_vx_nxv4i64_unmasked: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma ; RV64-NEXT: vdiv.vx v8, v8, a0 ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv4i64( %va, %vb, %m, i32 %evl) ret %v } declare @llvm.vp.sdiv.nxv8i64(, , , i32) define @vdiv_vv_nxv8i64( %va, %b, %m, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v16, v0.t ; CHECK-NEXT: ret %v = call @llvm.vp.sdiv.nxv8i64( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vv_nxv8i64_unmasked( %va, %b, i32 zeroext %evl) { ; CHECK-LABEL: vdiv_vv_nxv8i64_unmasked: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma ; CHECK-NEXT: vdiv.vv v8, v8, v16 ; CHECK-NEXT: ret %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i64( %va, %b, %m, i32 %evl) ret %v } define @vdiv_vx_nxv8i64( %va, i64 %b, %m, i32 zeroext %evl) { ; RV32-LABEL: vdiv_vx_nxv8i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma ; RV32-NEXT: vlse64.v v16, (a0), zero ; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma ; RV32-NEXT: vdiv.vv v8, v8, v16, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vdiv_vx_nxv8i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma ; RV64-NEXT: vdiv.vx v8, v8, a0, v0.t ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i64( %va, %vb, %m, i32 %evl) ret %v } define @vdiv_vx_nxv8i64_unmasked( %va, i64 %b, i32 zeroext %evl) { ; RV32-LABEL: vdiv_vx_nxv8i64_unmasked: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma ; RV32-NEXT: vlse64.v v16, (a0), zero ; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma ; RV32-NEXT: vdiv.vv v8, v8, v16 ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vdiv_vx_nxv8i64_unmasked: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma ; RV64-NEXT: vdiv.vx v8, v8, a0 ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %b, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer %head = insertelement poison, i1 true, i32 0 %m = shufflevector %head, poison, zeroinitializer %v = call @llvm.vp.sdiv.nxv8i64( %va, %vb, %m, i32 %evl) ret %v }