; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s define @vmand_vv_nxv1i1( %va, %vb) { ; CHECK-LABEL: vmand_vv_nxv1i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = and %va, %vb ret %vc } define @vmand_vv_nxv2i1( %va, %vb) { ; CHECK-LABEL: vmand_vv_nxv2i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = and %va, %vb ret %vc } define @vmand_vv_nxv4i1( %va, %vb) { ; CHECK-LABEL: vmand_vv_nxv4i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = and %va, %vb ret %vc } define @vmand_vv_nxv8i1( %va, %vb) { ; CHECK-LABEL: vmand_vv_nxv8i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = and %va, %vb ret %vc } define @vmand_vv_nxv16i1( %va, %vb) { ; CHECK-LABEL: vmand_vv_nxv16i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = and %va, %vb ret %vc } define @vmor_vv_nxv1i1( %va, %vb) { ; CHECK-LABEL: vmor_vv_nxv1i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = or %va, %vb ret %vc } define @vmor_vv_nxv2i1( %va, %vb) { ; CHECK-LABEL: vmor_vv_nxv2i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = or %va, %vb ret %vc } define @vmor_vv_nxv4i1( %va, %vb) { ; CHECK-LABEL: vmor_vv_nxv4i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = or %va, %vb ret %vc } define @vmor_vv_nxv8i1( %va, %vb) { ; CHECK-LABEL: vmor_vv_nxv8i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vmor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = or %va, %vb ret %vc } define @vmor_vv_nxv16i1( %va, %vb) { ; CHECK-LABEL: vmor_vv_nxv16i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; CHECK-NEXT: vmor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = or %va, %vb ret %vc } define @vmxor_vv_nxv1i1( %va, %vb) { ; CHECK-LABEL: vmxor_vv_nxv1i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmxor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = xor %va, %vb ret %vc } define @vmxor_vv_nxv2i1( %va, %vb) { ; CHECK-LABEL: vmxor_vv_nxv2i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmxor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = xor %va, %vb ret %vc } define @vmxor_vv_nxv4i1( %va, %vb) { ; CHECK-LABEL: vmxor_vv_nxv4i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmxor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = xor %va, %vb ret %vc } define @vmxor_vv_nxv8i1( %va, %vb) { ; CHECK-LABEL: vmxor_vv_nxv8i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vmxor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = xor %va, %vb ret %vc } define @vmxor_vv_nxv16i1( %va, %vb) { ; CHECK-LABEL: vmxor_vv_nxv16i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; CHECK-NEXT: vmxor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = xor %va, %vb ret %vc } define @vmnand_vv_nxv1i1( %va, %vb) { ; CHECK-LABEL: vmnand_vv_nxv1i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmnand.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = and %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmnand_vv_nxv2i1( %va, %vb) { ; CHECK-LABEL: vmnand_vv_nxv2i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmnand.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = and %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmnand_vv_nxv4i1( %va, %vb) { ; CHECK-LABEL: vmnand_vv_nxv4i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmnand.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = and %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmnand_vv_nxv8i1( %va, %vb) { ; CHECK-LABEL: vmnand_vv_nxv8i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vmnand.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = and %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmnand_vv_nxv16i1( %va, %vb) { ; CHECK-LABEL: vmnand_vv_nxv16i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; CHECK-NEXT: vmnand.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = and %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmnor_vv_nxv1i1( %va, %vb) { ; CHECK-LABEL: vmnor_vv_nxv1i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmnor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = or %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmnor_vv_nxv2i1( %va, %vb) { ; CHECK-LABEL: vmnor_vv_nxv2i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmnor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = or %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmnor_vv_nxv4i1( %va, %vb) { ; CHECK-LABEL: vmnor_vv_nxv4i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmnor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = or %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmnor_vv_nxv8i1( %va, %vb) { ; CHECK-LABEL: vmnor_vv_nxv8i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vmnor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = or %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmnor_vv_nxv16i1( %va, %vb) { ; CHECK-LABEL: vmnor_vv_nxv16i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; CHECK-NEXT: vmnor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = or %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmxnor_vv_nxv1i1( %va, %vb) { ; CHECK-LABEL: vmxnor_vv_nxv1i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmxnor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = xor %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmxnor_vv_nxv2i1( %va, %vb) { ; CHECK-LABEL: vmxnor_vv_nxv2i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmxnor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = xor %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmxnor_vv_nxv4i1( %va, %vb) { ; CHECK-LABEL: vmxnor_vv_nxv4i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmxnor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = xor %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmxnor_vv_nxv8i1( %va, %vb) { ; CHECK-LABEL: vmxnor_vv_nxv8i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vmxnor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = xor %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmxnor_vv_nxv16i1( %va, %vb) { ; CHECK-LABEL: vmxnor_vv_nxv16i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; CHECK-NEXT: vmxnor.mm v0, v0, v8 ; CHECK-NEXT: ret %vc = xor %va, %vb %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vc, %splat ret %not } define @vmandn_vv_nxv1i1( %va, %vb) { ; CHECK-LABEL: vmandn_vv_nxv1i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmandn.mm v0, v0, v8 ; CHECK-NEXT: ret %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vb, %splat %vc = and %va, %not ret %vc } define @vmandn_vv_nxv2i1( %va, %vb) { ; CHECK-LABEL: vmandn_vv_nxv2i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmandn.mm v0, v0, v8 ; CHECK-NEXT: ret %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vb, %splat %vc = and %va, %not ret %vc } define @vmandn_vv_nxv4i1( %va, %vb) { ; CHECK-LABEL: vmandn_vv_nxv4i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmandn.mm v0, v0, v8 ; CHECK-NEXT: ret %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vb, %splat %vc = and %va, %not ret %vc } define @vmandn_vv_nxv8i1( %va, %vb) { ; CHECK-LABEL: vmandn_vv_nxv8i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vmandn.mm v0, v0, v8 ; CHECK-NEXT: ret %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vb, %splat %vc = and %va, %not ret %vc } define @vmandn_vv_nxv16i1( %va, %vb) { ; CHECK-LABEL: vmandn_vv_nxv16i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; CHECK-NEXT: vmandn.mm v0, v0, v8 ; CHECK-NEXT: ret %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vb, %splat %vc = and %va, %not ret %vc } define @vmorn_vv_nxv1i1( %va, %vb) { ; CHECK-LABEL: vmorn_vv_nxv1i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmorn.mm v0, v0, v8 ; CHECK-NEXT: ret %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vb, %splat %vc = or %va, %not ret %vc } define @vmorn_vv_nxv2i1( %va, %vb) { ; CHECK-LABEL: vmorn_vv_nxv2i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmorn.mm v0, v0, v8 ; CHECK-NEXT: ret %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vb, %splat %vc = or %va, %not ret %vc } define @vmorn_vv_nxv4i1( %va, %vb) { ; CHECK-LABEL: vmorn_vv_nxv4i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmorn.mm v0, v0, v8 ; CHECK-NEXT: ret %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vb, %splat %vc = or %va, %not ret %vc } define @vmorn_vv_nxv8i1( %va, %vb) { ; CHECK-LABEL: vmorn_vv_nxv8i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vmorn.mm v0, v0, v8 ; CHECK-NEXT: ret %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vb, %splat %vc = or %va, %not ret %vc } define @vmorn_vv_nxv16i1( %va, %vb) { ; CHECK-LABEL: vmorn_vv_nxv16i1: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; CHECK-NEXT: vmorn.mm v0, v0, v8 ; CHECK-NEXT: ret %head = insertelement poison, i1 1, i32 0 %splat = shufflevector %head, poison, zeroinitializer %not = xor %vb, %splat %vc = or %va, %not ret %vc }