# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=riscv64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
# RUN: llc -mtriple=riscv64 -run-pass=instruction-select -verify-machineinstrs -mattr='+zba' %s -o - | FileCheck %s --check-prefix=ZBA
---
name:            zext_32_64
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    ; CHECK-LABEL: name: zext_32_64
    ; CHECK: [[LUI:%[0-9]+]]:gpr = LUI 524288
    ; CHECK-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[LUI]], 32
    ; CHECK-NEXT: [[SRLI:%[0-9]+]]:gpr = SRLI [[SLLI]], 32
    ; CHECK-NEXT: $x8 = COPY [[SRLI]]
    ;
    ; ZBA-LABEL: name: zext_32_64
    ; ZBA: [[LUI:%[0-9]+]]:gpr = LUI 524288
    ; ZBA-NEXT: [[ADD_UW:%[0-9]+]]:gpr = ADD_UW [[LUI]], $x0
    ; ZBA-NEXT: $x8 = COPY [[ADD_UW]]
    %0:gprb(s32) = G_CONSTANT i32 -2147483648
    %1:gprb(s64) = G_ZEXT %0
    $x8 = COPY %1(s64)
...