# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -mtriple=riscv64 -run-pass=instruction-select \
# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s

---
name:            shl
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: shl
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $x10 = COPY [[SLL]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = COPY $x10
    %1:gprb(s64) = COPY $x11
    %3:gprb(s64) = G_SHL %0, %1
    $x10 = COPY %3(s64)
    PseudoRET implicit $x10
...

---
name:            shl_zext
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: shl_zext
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 1
    ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[ADDI]]
    ; CHECK-NEXT: $x10 = COPY [[SLL]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = COPY $x10
    %1:gprb(s32) = G_CONSTANT i32 1
    %2:gprb(s64) = G_ZEXT %1
    %3:gprb(s64) = G_SHL %0, %2(s64)
    $x10 = COPY %3(s64)
    PseudoRET implicit $x10
...

---
name:            shl_and
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: shl_and
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $x10 = COPY [[SLL]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = COPY $x10
    %1:gprb(s64) = COPY $x11
    %2:gprb(s64) = G_CONSTANT i64 63
    %3:gprb(s64) = G_AND %1, %2
    %4:gprb(s64) = G_SHL %0, %3(s64)
    $x10 = COPY %4(s64)
    PseudoRET implicit $x10
...

---
name:            shl_and_with_simplified_mask
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: shl_and_with_simplified_mask
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY1]], 62
    ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[ANDI]]
    ; CHECK-NEXT: $x10 = COPY [[SLL]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = COPY $x10
    %1:gprb(s64) = COPY $x11
    %2:gprb(s64) = G_CONSTANT i64 62
    %3:gprb(s64) = G_AND %1, %2
    %4:gprb(s64) = G_CONSTANT i64 62
    %5:gprb(s64) = G_AND %3, %4
    %6:gprb(s64) = G_SHL %0, %5(s64)
    $x10 = COPY %6(s64)
    PseudoRET implicit $x10
...

---
name:            shl_add
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: shl_add
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $x10 = COPY [[SLL]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = COPY $x10
    %1:gprb(s64) = COPY $x11
    %2:gprb(s64) = G_CONSTANT i64 64
    %3:gprb(s64) = G_ADD %1, %2
    %4:gprb(s64) = G_SHL %0, %3(s64)
    $x10 = COPY %4(s64)
    PseudoRET implicit $x10
...

---
name:            shl_sub
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: shl_sub
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[SUBW:%[0-9]+]]:gpr = SUBW $x0, [[COPY1]]
    ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[SUBW]]
    ; CHECK-NEXT: $x10 = COPY [[SLL]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = COPY $x10
    %1:gprb(s64) = COPY $x11
    %2:gprb(s64) = G_CONSTANT i64 64
    %3:gprb(s64) = G_SUB %2, %1
    %4:gprb(s64) = G_SHL %0, %3(s64)
    $x10 = COPY %4(s64)
    PseudoRET implicit $x10
...

---
name:            shl_bitwise_not
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: shl_bitwise_not
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[COPY1]], -1
    ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[XORI]]
    ; CHECK-NEXT: $x10 = COPY [[SLL]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = COPY $x10
    %1:gprb(s64) = COPY $x11
    %2:gprb(s64) = G_CONSTANT i64 -1
    %3:gprb(s64) = G_SUB %2, %1
    %4:gprb(s64) = G_SHL %0, %3(s64)
    $x10 = COPY %4(s64)
    PseudoRET implicit $x10
...

---
name:            shl_bitwise_not_2
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: shl_bitwise_not_2
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[COPY1]], -1
    ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[XORI]]
    ; CHECK-NEXT: $x10 = COPY [[SLL]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = COPY $x10
    %1:gprb(s64) = COPY $x11
    %2:gprb(s64) = G_CONSTANT i64 63
    %3:gprb(s64) = G_SUB %2, %1
    %4:gprb(s64) = G_SHL %0, %3(s64)
    $x10 = COPY %4(s64)
    PseudoRET implicit $x10
...

---
name:            shl_and_zext
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: shl_and_zext
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[LW:%[0-9]+]]:gpr = LW [[COPY1]], 0 :: (load (s32))
    ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[LW]]
    ; CHECK-NEXT: $x10 = COPY [[SLL]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = COPY $x10
    %1:gprb(p0) = COPY $x11
    %2:gprb(s32) = G_LOAD %1(p0) :: (load (s32))
    %3:gprb(s32) = G_CONSTANT i32 63
    %4:gprb(s32) = G_AND %2, %3
    %5:gprb(s64) = G_ZEXT %4
    %6:gprb(s64) = G_SHL %0, %5(s64)
    $x10 = COPY %6(s64)
    PseudoRET implicit $x10
...