; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py ; RUN: opt -passes="print" 2>&1 -disable-output < %s | FileCheck %s ; RUN: opt -passes="print" 2>&1 -disable-output -mcpu=neoverse-v1 < %s | FileCheck %s --check-prefix=CHECK-VSCALE-2 ; RUN: opt -passes="print" 2>&1 -disable-output -mcpu=neoverse-n2 < %s | FileCheck %s --check-prefix=CHECK-VSCALE-1 ; RUN: opt -passes="print" 2>&1 -disable-output -mcpu=cortex-a510 < %s | FileCheck %s --check-prefix=CHECK-VSCALE-1 target triple="aarch64--linux-gnu" target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" define void @masked_scatters( %nxv4i1mask, %nxv8i1mask, <4 x i1> %v4i1mask, <1 x i1> %v1i1mask, %nxv1i1mask) #0 { ; CHECK-LABEL: 'masked_scatters' ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4i32.nxv4p0( undef, undef, i32 0, %nxv4i1mask) ; CHECK-NEXT: Cost Model: Found an estimated cost of 160 for instruction: call void @llvm.masked.scatter.nxv8i32.nxv8p0( undef, undef, i32 0, %nxv8i1mask) ; CHECK-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.masked.scatter.nxv1i64.nxv1p0( undef, undef, i32 0, %nxv1i1mask) ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; ; CHECK-VSCALE-2-LABEL: 'masked_scatters' ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4i32.nxv4p0( undef, undef, i32 0, %nxv4i1mask) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: call void @llvm.masked.scatter.nxv8i32.nxv8p0( undef, undef, i32 0, %nxv8i1mask) ; CHECK-VSCALE-2-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.masked.scatter.nxv1i64.nxv1p0( undef, undef, i32 0, %nxv1i1mask) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; ; CHECK-VSCALE-1-LABEL: 'masked_scatters' ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 40 for instruction: call void @llvm.masked.scatter.nxv4i32.nxv4p0( undef, undef, i32 0, %nxv4i1mask) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv8i32.nxv8p0( undef, undef, i32 0, %nxv8i1mask) ; CHECK-VSCALE-1-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.masked.scatter.nxv1i64.nxv1p0( undef, undef, i32 0, %nxv1i1mask) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; call void @llvm.masked.scatter.nxv4i32( undef, undef, i32 0, %nxv4i1mask) call void @llvm.masked.scatter.nxv8i32( undef, undef, i32 0, %nxv8i1mask) call void @llvm.masked.scatter.nxv1i64( undef, undef, i32 0, %nxv1i1mask) ret void } define void @masked_scatters_tune_generic( %nxv4i1mask, %nxv8i1mask, <4 x i1> %v4i1mask, <1 x i1> %v1i1mask, %nxv1i1mask) #1 { ; CHECK-LABEL: 'masked_scatters_tune_generic' ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4i32.nxv4p0( undef, undef, i32 0, %nxv4i1mask) ; CHECK-NEXT: Cost Model: Found an estimated cost of 160 for instruction: call void @llvm.masked.scatter.nxv8i32.nxv8p0( undef, undef, i32 0, %nxv8i1mask) ; CHECK-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.masked.scatter.nxv1i64.nxv1p0( undef, undef, i32 0, %nxv1i1mask) ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; ; CHECK-VSCALE-2-LABEL: 'masked_scatters_tune_generic' ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4i32.nxv4p0( undef, undef, i32 0, %nxv4i1mask) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: call void @llvm.masked.scatter.nxv8i32.nxv8p0( undef, undef, i32 0, %nxv8i1mask) ; CHECK-VSCALE-2-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.masked.scatter.nxv1i64.nxv1p0( undef, undef, i32 0, %nxv1i1mask) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; ; CHECK-VSCALE-1-LABEL: 'masked_scatters_tune_generic' ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4i32.nxv4p0( undef, undef, i32 0, %nxv4i1mask) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 160 for instruction: call void @llvm.masked.scatter.nxv8i32.nxv8p0( undef, undef, i32 0, %nxv8i1mask) ; CHECK-VSCALE-1-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.masked.scatter.nxv1i64.nxv1p0( undef, undef, i32 0, %nxv1i1mask) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; call void @llvm.masked.scatter.nxv4i32( undef, undef, i32 0, %nxv4i1mask) call void @llvm.masked.scatter.nxv8i32( undef, undef, i32 0, %nxv8i1mask) call void @llvm.masked.scatter.nxv1i64( undef, undef, i32 0, %nxv1i1mask) ret void } define void @masked_scatters_no_vscale_range() #2 { ; CHECK-LABEL: 'masked_scatters_no_vscale_range' ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4f64.nxv4p0( undef, undef, i32 1, undef) ; CHECK-NEXT: Cost Model: Found an estimated cost of 40 for instruction: call void @llvm.masked.scatter.nxv2f64.nxv2p0( undef, undef, i32 1, undef) ; CHECK-NEXT: Cost Model: Found an estimated cost of 160 for instruction: call void @llvm.masked.scatter.nxv8f32.nxv8p0( undef, undef, i32 1, undef) ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4f32.nxv4p0( undef, undef, i32 1, undef) ; CHECK-NEXT: Cost Model: Found an estimated cost of 40 for instruction: call void @llvm.masked.scatter.nxv2f32.nxv2p0( undef, undef, i32 1, undef) ; CHECK-NEXT: Cost Model: Found an estimated cost of 320 for instruction: call void @llvm.masked.scatter.nxv16i16.nxv16p0( undef, undef, i32 1, undef) ; CHECK-NEXT: Cost Model: Found an estimated cost of 160 for instruction: call void @llvm.masked.scatter.nxv8i16.nxv8p0( undef, undef, i32 1, undef) ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4i16.nxv4p0( undef, undef, i32 1, undef) ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; ; CHECK-VSCALE-2-LABEL: 'masked_scatters_no_vscale_range' ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4f64.nxv4p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: call void @llvm.masked.scatter.nxv2f64.nxv2p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: call void @llvm.masked.scatter.nxv8f32.nxv8p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4f32.nxv4p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: call void @llvm.masked.scatter.nxv2f32.nxv2p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: call void @llvm.masked.scatter.nxv16i16.nxv16p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: call void @llvm.masked.scatter.nxv8i16.nxv8p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv4i16.nxv4p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; ; CHECK-VSCALE-1-LABEL: 'masked_scatters_no_vscale_range' ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 40 for instruction: call void @llvm.masked.scatter.nxv4f64.nxv4p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 20 for instruction: call void @llvm.masked.scatter.nxv2f64.nxv2p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv8f32.nxv8p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 40 for instruction: call void @llvm.masked.scatter.nxv4f32.nxv4p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 20 for instruction: call void @llvm.masked.scatter.nxv2f32.nxv2p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 160 for instruction: call void @llvm.masked.scatter.nxv16i16.nxv16p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 80 for instruction: call void @llvm.masked.scatter.nxv8i16.nxv8p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 40 for instruction: call void @llvm.masked.scatter.nxv4i16.nxv4p0( undef, undef, i32 1, undef) ; CHECK-VSCALE-1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; call void @llvm.masked.scatter.nxv4f64( undef, undef, i32 1, undef) call void @llvm.masked.scatter.nxv2f64( undef, undef, i32 1, undef) call void @llvm.masked.scatter.nxv8f32( undef, undef, i32 1, undef) call void @llvm.masked.scatter.nxv4f32( undef, undef, i32 1, undef) call void @llvm.masked.scatter.nxv2f32( undef, undef, i32 1, undef) call void @llvm.masked.scatter.nxv16i16( undef, undef, i32 1, undef) call void @llvm.masked.scatter.nxv8i16( undef, undef, i32 1, undef) call void @llvm.masked.scatter.nxv4i16( undef, undef, i32 1, undef) ret void } attributes #0 = { "target-features"="+sve" vscale_range(1, 8) } attributes #1 = { "target-features"="+sve" vscale_range(1, 16) "tune-cpu"="generic" } attributes #2 = { "target-features"="+sve" } declare void @llvm.masked.scatter.nxv4i32(, , i32, ) declare void @llvm.masked.scatter.nxv8i32(, , i32, ) declare void @llvm.masked.scatter.nxv1i64(, , i32, ) declare void @llvm.masked.scatter.nxv4f64(, , i32, ) declare void @llvm.masked.scatter.nxv2f64(, , i32, ) declare void @llvm.masked.scatter.nxv8f32(, , i32, ) declare void @llvm.masked.scatter.nxv4f32(, , i32, ) declare void @llvm.masked.scatter.nxv2f32(, , i32, ) declare void @llvm.masked.scatter.nxv16i16(, , i32, ) declare void @llvm.masked.scatter.nxv8i16(, , i32, ) declare void @llvm.masked.scatter.nxv4i16(, , i32, )