# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-linux-gnu -O0 -run-pass=legalizer %s -o - -global-isel-abort=2 | FileCheck %s
---
name:            pr63826_v2s16
body:             |
  bb.0:
    liveins: $d0
    ; CHECK-LABEL: name: pr63826_v2s16
    ; CHECK: liveins: $d0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<2 x s32>) = G_INSERT_VECTOR_ELT [[COPY]], [[C1]](s32), [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY [[IVEC]](<2 x s32>)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %1:_(<2 x s32>) = COPY $d0
    %0:_(<2 x s16>) = G_TRUNC %1(<2 x s32>)
    %4:_(s32) = G_CONSTANT i32 0
    %3:_(s16) = G_CONSTANT i16 1
    %2:_(<2 x s16>) = G_INSERT_VECTOR_ELT %0, %3(s16), %4(s32)
    %5:_(<2 x s32>) = G_ANYEXT %2(<2 x s16>)
    $d0 = COPY %5(<2 x s32>)
    RET_ReallyLR implicit $d0
...
---
name:            pr63826_v2s8
body:             |
  bb.0:
    liveins: $d0
    ; CHECK-LABEL: name: pr63826_v2s8
    ; CHECK: liveins: $d0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<2 x s32>) = G_INSERT_VECTOR_ELT [[COPY]], [[C1]](s32), [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY [[IVEC]](<2 x s32>)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %1:_(<2 x s32>) = COPY $d0
    %0:_(<2 x s8>) = G_TRUNC %1(<2 x s32>)
    %4:_(s32) = G_CONSTANT i32 0
    %3:_(s8) = G_CONSTANT i8 1
    %2:_(<2 x s8>) = G_INSERT_VECTOR_ELT %0, %3(s8), %4(s32)
    %5:_(<2 x s32>) = G_ANYEXT %2(<2 x s8>)
    $d0 = COPY %5(<2 x s32>)
    RET_ReallyLR implicit $d0
...
---
name:            pr63826_v4s8
body:             |
  bb.0:
    liveins: $d0
    ; CHECK-LABEL: name: pr63826_v4s8
    ; CHECK: liveins: $d0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<4 x s16>) = G_INSERT_VECTOR_ELT [[COPY]], [[C1]](s16), [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY [[IVEC]](<4 x s16>)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %1:_(<4 x s16>) = COPY $d0
    %0:_(<4 x s8>) = G_TRUNC %1(<4 x s16>)
    %4:_(s32) = G_CONSTANT i32 0
    %3:_(s8) = G_CONSTANT i8 1
    %2:_(<4 x s8>) = G_INSERT_VECTOR_ELT %0, %3(s8), %4(s32)
    %5:_(<4 x s16>) = G_ANYEXT %2(<4 x s8>)
    $d0 = COPY %5(<4 x s16>)
    RET_ReallyLR implicit $d0
...
---
name:            v8s8
body: |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: v8s8
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s8>) = COPY $d0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %val:_(s8) = G_CONSTANT i8 42
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<8 x s8>) = G_INSERT_VECTOR_ELT [[COPY]], %val(s8), [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY [[IVEC]](<8 x s8>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(<8 x s8>) = COPY $d0
    %1:_(s32) = G_CONSTANT i32 1
    %val:_(s8) = G_CONSTANT i8 42
    %2:_(<8 x s8>) = G_INSERT_VECTOR_ELT %0(<8 x s8>), %val(s8), %1(s32)
    $d0 = COPY %2(<8 x s8>)
    RET_ReallyLR
...
---
name:            v16s8
body: |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: v16s8
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %val:_(s8) = G_CONSTANT i8 42
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<16 x s8>) = G_INSERT_VECTOR_ELT [[COPY]], %val(s8), [[C]](s32)
    ; CHECK-NEXT: $q0 = COPY [[IVEC]](<16 x s8>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(<16 x s8>) = COPY $q0
    %1:_(s32) = G_CONSTANT i32 1
    %val:_(s8) = G_CONSTANT i8 42
    %2:_(<16 x s8>) = G_INSERT_VECTOR_ELT %0(<16 x s8>), %val(s8), %1(s32)
    $q0 = COPY %2(<16 x s8>)
    RET_ReallyLR
...
---
name:            v4s16
body: |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: v4s16
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %val:_(s16) = G_CONSTANT i16 42
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<4 x s16>) = G_INSERT_VECTOR_ELT [[COPY]], %val(s16), [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY [[IVEC]](<4 x s16>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(<4 x s16>) = COPY $d0
    %1:_(s32) = G_CONSTANT i32 1
    %val:_(s16) = G_CONSTANT i16 42
    %2:_(<4 x s16>) = G_INSERT_VECTOR_ELT %0(<4 x s16>), %val(s16), %1(s32)
    $d0 = COPY %2(<4 x s16>)
    RET_ReallyLR
...
---
name:            v8s16
body: |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: v8s16
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %val:_(s16) = G_CONSTANT i16 42
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<8 x s16>) = G_INSERT_VECTOR_ELT [[COPY]], %val(s16), [[C]](s32)
    ; CHECK-NEXT: $q0 = COPY [[IVEC]](<8 x s16>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(<8 x s16>) = COPY $q0
    %1:_(s32) = G_CONSTANT i32 1
    %val:_(s16) = G_CONSTANT i16 42
    %2:_(<8 x s16>) = G_INSERT_VECTOR_ELT %0(<8 x s16>), %val(s16), %1(s32)
    $q0 = COPY %2(<8 x s16>)
    RET_ReallyLR
...
---
name:            v2s32
body: |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: v2s32
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %val:_(s32) = G_CONSTANT i32 42
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<2 x s32>) = G_INSERT_VECTOR_ELT [[COPY]], %val(s32), [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY [[IVEC]](<2 x s32>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(<2 x s32>) = COPY $d0
    %1:_(s32) = G_CONSTANT i32 1
    %val:_(s32) = G_CONSTANT i32 42
    %2:_(<2 x s32>) = G_INSERT_VECTOR_ELT %0(<2 x s32>), %val(s32), %1(s32)
    $d0 = COPY %2(<2 x s32>)
    RET_ReallyLR
...
---
name:            v4s32
body: |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: v4s32
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %val:_(s32) = G_CONSTANT i32 42
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<4 x s32>) = G_INSERT_VECTOR_ELT [[COPY]], %val(s32), [[C]](s32)
    ; CHECK-NEXT: $q0 = COPY [[IVEC]](<4 x s32>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(<4 x s32>) = COPY $q0
    %1:_(s32) = G_CONSTANT i32 1
    %val:_(s32) = G_CONSTANT i32 42
    %2:_(<4 x s32>) = G_INSERT_VECTOR_ELT %0(<4 x s32>), %val(s32), %1(s32)
    $q0 = COPY %2(<4 x s32>)
    RET_ReallyLR
...
---
name:            v2s64
body: |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: v2s64
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %val:_(s64) = G_CONSTANT i64 42
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<2 x s64>) = G_INSERT_VECTOR_ELT [[COPY]], %val(s64), [[C]](s32)
    ; CHECK-NEXT: $q0 = COPY [[IVEC]](<2 x s64>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(<2 x s64>) = COPY $q0
    %1:_(s32) = G_CONSTANT i32 1
    %val:_(s64) = G_CONSTANT i64 42
    %2:_(<2 x s64>) = G_INSERT_VECTOR_ELT %0(<2 x s64>), %val(s64), %1(s32)
    $q0 = COPY %2(<2 x s64>)
    RET_ReallyLR
...
---
name:            v3s8_crash
body:             |
  ; CHECK-LABEL: name: v3s8_crash
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $w1, $w2, $w3, $x0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $w2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s32) = COPY $w3
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(<3 x s8>) = G_TRUNC [[BUILD_VECTOR]](<3 x s32>)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
  ; CHECK-NEXT:   [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s8>) = G_BUILD_VECTOR [[C1]](s8), [[DEF]](s8), [[DEF]](s8)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
  ; CHECK-NEXT:   [[IVEC:%[0-9]+]]:_(<3 x s8>) = G_INSERT_VECTOR_ELT [[TRUNC]], [[C3]](s8), [[C2]](s64)
  ; CHECK-NEXT:   [[SHUF:%[0-9]+]]:_(<12 x s8>) = G_SHUFFLE_VECTOR [[IVEC]](<3 x s8>), [[BUILD_VECTOR1]], shufflemask(0, 3, 3, 3, 1, 3, 3, 3, 2, 3, 3, 3)
  ; CHECK-NEXT:   [[BITCAST:%[0-9]+]]:_(<3 x s32>) = G_BITCAST [[SHUF]](<12 x s8>)
  ; CHECK-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BITCAST]](<3 x s32>)
  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[DEF1]](s32)
  ; CHECK-NEXT:   [[UITOFP:%[0-9]+]]:_(<4 x s32>) = G_UITOFP [[BUILD_VECTOR2]](<4 x s32>)
  ; CHECK-NEXT:   [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UITOFP]](<4 x s32>)
  ; CHECK-NEXT:   [[BUILD_VECTOR3:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UV3]](s32), [[UV4]](s32), [[UV5]](s32)
  ; CHECK-NEXT:   [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR3]](<3 x s32>)
  ; CHECK-NEXT:   G_STORE [[UV7]](s32), [[COPY]](p0) :: (store (s32), align 16)
  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
  ; CHECK-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C4]](s64)
  ; CHECK-NEXT:   G_STORE [[UV8]](s32), [[PTR_ADD]](p0) :: (store (s32) into unknown-address + 4)
  ; CHECK-NEXT:   [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
  ; CHECK-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C5]](s64)
  ; CHECK-NEXT:   G_STORE [[UV9]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 8, align 8)
  ; CHECK-NEXT:   G_BR %bb.1
  bb.1:
    liveins: $w1, $w2, $w3, $x0

    %0:_(p0) = COPY $x0
    %2:_(s32) = COPY $w1
    %3:_(s32) = COPY $w2
    %4:_(s32) = COPY $w3
    %5:_(<3 x s32>) = G_BUILD_VECTOR %2(s32), %3(s32), %4(s32)
    %1:_(<3 x s8>) = G_TRUNC %5(<3 x s32>)
    %8:_(s64) = G_CONSTANT i64 0
    %11:_(s8) = G_IMPLICIT_DEF
    %7:_(s8) = G_CONSTANT i8 0
    %10:_(<3 x s8>) = G_BUILD_VECTOR %7(s8), %11(s8), %11(s8)

  bb.2:
    %14:_(s64) = G_CONSTANT i64 0
    %15:_(s8) = G_CONSTANT i8 0
    %6:_(<3 x s8>) = G_INSERT_VECTOR_ELT %1, %15(s8), %14(s64)
    %9:_(<12 x s8>) = G_SHUFFLE_VECTOR %6(<3 x s8>), %10, shufflemask(0, 3, 3, 3, 1, 3, 3, 3, 2, 3, 3, 3)
    %12:_(<3 x s32>) = G_BITCAST %9(<12 x s8>)
    %13:_(<3 x s32>) = G_UITOFP %12(<3 x s32>)
    G_STORE %13(<3 x s32>), %0(p0) :: (store (<3 x s32>))
    G_BR %bb.2

...