; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s --mattr=+sve2 -o - | FileCheck %s target triple = "aarch64-arm-none-eabi" ; Expected to transform define @complex_mul_v2i64( %a, %b) { ; CHECK-LABEL: complex_mul_v2i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: mov z2.d, #0 // =0x0 ; CHECK-NEXT: cmla z2.d, z1.d, z0.d, #0 ; CHECK-NEXT: cmla z2.d, z1.d, z0.d, #90 ; CHECK-NEXT: mov z0.d, z2.d ; CHECK-NEXT: ret entry: %a.deinterleaved = tail call { , } @llvm.experimental.vector.deinterleave2.nxv2i64( %a) %a.real = extractvalue { , } %a.deinterleaved, 0 %a.imag = extractvalue { , } %a.deinterleaved, 1 %b.deinterleaved = tail call { , } @llvm.experimental.vector.deinterleave2.nxv2i64( %b) %b.real = extractvalue { , } %b.deinterleaved, 0 %b.imag = extractvalue { , } %b.deinterleaved, 1 %0 = mul %b.imag, %a.real %1 = mul %b.real, %a.imag %2 = add %1, %0 %3 = mul %b.real, %a.real %4 = mul %a.imag, %b.imag %5 = sub %3, %4 %interleaved.vec = tail call @llvm.experimental.vector.interleave2.nxv2i64( %5, %2) ret %interleaved.vec } ; Expected to transform define @complex_mul_v4i64( %a, %b) { ; CHECK-LABEL: complex_mul_v4i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: mov z4.d, #0 // =0x0 ; CHECK-NEXT: mov z5.d, z4.d ; CHECK-NEXT: cmla z4.d, z3.d, z1.d, #0 ; CHECK-NEXT: cmla z5.d, z2.d, z0.d, #0 ; CHECK-NEXT: cmla z4.d, z3.d, z1.d, #90 ; CHECK-NEXT: cmla z5.d, z2.d, z0.d, #90 ; CHECK-NEXT: mov z1.d, z4.d ; CHECK-NEXT: mov z0.d, z5.d ; CHECK-NEXT: ret entry: %a.deinterleaved = tail call { , } @llvm.experimental.vector.deinterleave2.nxv4i64( %a) %a.real = extractvalue { , } %a.deinterleaved, 0 %a.imag = extractvalue { , } %a.deinterleaved, 1 %b.deinterleaved = tail call { , } @llvm.experimental.vector.deinterleave2.nxv4i64( %b) %b.real = extractvalue { , } %b.deinterleaved, 0 %b.imag = extractvalue { , } %b.deinterleaved, 1 %0 = mul %b.imag, %a.real %1 = mul %b.real, %a.imag %2 = add %1, %0 %3 = mul %b.real, %a.real %4 = mul %a.imag, %b.imag %5 = sub %3, %4 %interleaved.vec = tail call @llvm.experimental.vector.interleave2.nxv4i64( %5, %2) ret %interleaved.vec } ; Expected to transform define @complex_mul_v8i64( %a, %b) { ; CHECK-LABEL: complex_mul_v8i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: mov z24.d, #0 // =0x0 ; CHECK-NEXT: mov z25.d, z24.d ; CHECK-NEXT: mov z26.d, z24.d ; CHECK-NEXT: mov z27.d, z24.d ; CHECK-NEXT: cmla z24.d, z7.d, z3.d, #0 ; CHECK-NEXT: cmla z25.d, z4.d, z0.d, #0 ; CHECK-NEXT: cmla z26.d, z5.d, z1.d, #0 ; CHECK-NEXT: cmla z27.d, z6.d, z2.d, #0 ; CHECK-NEXT: cmla z24.d, z7.d, z3.d, #90 ; CHECK-NEXT: cmla z25.d, z4.d, z0.d, #90 ; CHECK-NEXT: cmla z26.d, z5.d, z1.d, #90 ; CHECK-NEXT: cmla z27.d, z6.d, z2.d, #90 ; CHECK-NEXT: mov z3.d, z24.d ; CHECK-NEXT: mov z0.d, z25.d ; CHECK-NEXT: mov z1.d, z26.d ; CHECK-NEXT: mov z2.d, z27.d ; CHECK-NEXT: ret entry: %a.deinterleaved = tail call { , } @llvm.experimental.vector.deinterleave2.nxv8i64( %a) %a.real = extractvalue { , } %a.deinterleaved, 0 %a.imag = extractvalue { , } %a.deinterleaved, 1 %b.deinterleaved = tail call { , } @llvm.experimental.vector.deinterleave2.nxv8i64( %b) %b.real = extractvalue { , } %b.deinterleaved, 0 %b.imag = extractvalue { , } %b.deinterleaved, 1 %0 = mul %b.imag, %a.real %1 = mul %b.real, %a.imag %2 = add %1, %0 %3 = mul %b.real, %a.real %4 = mul %a.imag, %b.imag %5 = sub %3, %4 %interleaved.vec = tail call @llvm.experimental.vector.interleave2.nxv8i64( %5, %2) ret %interleaved.vec } ; Expected to transform define @complex_minus_mul_v8i64( %a, %b) { ; CHECK-LABEL: complex_minus_mul_v8i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: mov z24.d, #0 // =0x0 ; CHECK-NEXT: mov z25.d, z24.d ; CHECK-NEXT: mov z26.d, z24.d ; CHECK-NEXT: mov z27.d, z24.d ; CHECK-NEXT: cmla z24.d, z7.d, z3.d, #270 ; CHECK-NEXT: cmla z25.d, z4.d, z0.d, #270 ; CHECK-NEXT: cmla z26.d, z5.d, z1.d, #270 ; CHECK-NEXT: cmla z27.d, z6.d, z2.d, #270 ; CHECK-NEXT: cmla z24.d, z7.d, z3.d, #180 ; CHECK-NEXT: cmla z25.d, z4.d, z0.d, #180 ; CHECK-NEXT: cmla z26.d, z5.d, z1.d, #180 ; CHECK-NEXT: cmla z27.d, z6.d, z2.d, #180 ; CHECK-NEXT: mov z3.d, z24.d ; CHECK-NEXT: mov z0.d, z25.d ; CHECK-NEXT: mov z1.d, z26.d ; CHECK-NEXT: mov z2.d, z27.d ; CHECK-NEXT: ret entry: %a.deinterleaved = tail call { , } @llvm.experimental.vector.deinterleave2.nxv8i64( %a) %a.real = extractvalue { , } %a.deinterleaved, 0 %a.imag = extractvalue { , } %a.deinterleaved, 1 %0 = sub zeroinitializer, %a.real %b.deinterleaved = tail call { , } @llvm.experimental.vector.deinterleave2.nxv8i64( %b) %b.real = extractvalue { , } %b.deinterleaved, 0 %b.imag = extractvalue { , } %b.deinterleaved, 1 %1 = mul %b.real, %0 %2 = mul %b.imag, %a.imag %3 = add %2, %1 %4 = mul %b.real, %a.imag %5 = mul %b.imag, %0 %6 = sub %5, %4 %interleaved.vec = tail call @llvm.experimental.vector.interleave2.nxv8i64( %3, %6) ret %interleaved.vec } declare { , } @llvm.experimental.vector.deinterleave2.nxv2i64() declare @llvm.experimental.vector.interleave2.nxv2i64(, ) declare { , } @llvm.experimental.vector.deinterleave2.nxv4i64() declare @llvm.experimental.vector.interleave2.nxv4i64(, ) declare { , } @llvm.experimental.vector.deinterleave2.nxv8i64() declare @llvm.experimental.vector.interleave2.nxv8i64(, )