; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s define @vselect_fmul_f16( %p, %a, %b) { ; CHECK-LABEL: vselect_fmul_f16: ; CHECK: // %bb.0: ; CHECK-NEXT: fmul z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret %mul = fmul %a, %b %sel = select %p, %mul, %a ret %sel } define @vselect_fmul_f32( %p, %a, %b) { ; CHECK-LABEL: vselect_fmul_f32: ; CHECK: // %bb.0: ; CHECK-NEXT: fmul z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret %mul = fmul %a, %b %sel = select %p, %mul, %a ret %sel } define @vselect_fmul_f64( %p, %a, %b) { ; CHECK-LABEL: vselect_fmul_f64: ; CHECK: // %bb.0: ; CHECK-NEXT: fmul z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret %mul = fmul %a, %b %sel = select %p, %mul, %a ret %sel } define @vselect_fadd_f16( %p, %a, %b) { ; CHECK-LABEL: vselect_fadd_f16: ; CHECK: // %bb.0: ; CHECK-NEXT: fadd z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret %add = fadd %a, %b %sel = select %p, %add, %a ret %sel } define @vselect_fadd_f32( %p, %a, %b) { ; CHECK-LABEL: vselect_fadd_f32: ; CHECK: // %bb.0: ; CHECK-NEXT: fadd z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret %add = fadd %a, %b %sel = select %p, %add, %a ret %sel } define @vselect_fadd_f64( %p, %a, %b) { ; CHECK-LABEL: vselect_fadd_f64: ; CHECK: // %bb.0: ; CHECK-NEXT: fadd z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret %add = fadd %a, %b %sel = select %p, %add, %a ret %sel } define @vselect_fsub_f16( %p, %a, %b) { ; CHECK-LABEL: vselect_fsub_f16: ; CHECK: // %bb.0: ; CHECK-NEXT: fsub z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret %sub = fsub %a, %b %sel = select %p, %sub, %a ret %sel } define @vselect_fsub_f32( %p, %a, %b) { ; CHECK-LABEL: vselect_fsub_f32: ; CHECK: // %bb.0: ; CHECK-NEXT: fsub z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret %sub = fsub %a, %b %sel = select %p, %sub, %a ret %sel } define @vselect_fsub_f64( %p, %a, %b) { ; CHECK-LABEL: vselect_fsub_f64: ; CHECK: // %bb.0: ; CHECK-NEXT: fsub z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret %sub = fsub %a, %b %sel = select %p, %sub, %a ret %sel }