; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s | FileCheck %s target triple = "aarch64-unknown-linux-gnu" define @fadd_h_immhalf( %pg, %a) #0 { ; CHECK-LABEL: fadd_h_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv8f16( %pg, %a, %splat) ret %out } define @fadd_h_immhalf_zero( %pg, %a) #1 { ; CHECK-LABEL: fadd_h_immhalf_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv8f16( %pg, %a_z, %splat) ret %out } define @fadd_h_immone( %pg, %a) #0 { ; CHECK-LABEL: fadd_h_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv8f16( %pg, %a, %splat) ret %out } define @fadd_h_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fadd_h_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv8f16( %pg, %a_z, %splat) ret %out } define @fadd_s_immhalf( %pg, %a) #0 { ; CHECK-LABEL: fadd_s_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv4f32( %pg, %a, %splat) ret %out } define @fadd_s_immhalf_zero( %pg, %a) #1 { ; CHECK-LABEL: fadd_s_immhalf_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv4f32( %pg, %a_z, %splat) ret %out } define @fadd_s_immone( %pg, %a) #0 { ; CHECK-LABEL: fadd_s_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv4f32( %pg, %a, %splat) ret %out } define @fadd_s_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fadd_s_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv4f32( %pg, %a_z, %splat) ret %out } define @fadd_d_immhalf( %pg, %a) #0 { ; CHECK-LABEL: fadd_d_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv2f64( %pg, %a, %splat) ret %out } define @fadd_d_immhalf_zero( %pg, %a) #1 { ; CHECK-LABEL: fadd_d_immhalf_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv2f64( %pg, %a_z, %splat) ret %out } define @fadd_d_immone( %pg, %a) #0 { ; CHECK-LABEL: fadd_d_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv2f64( %pg, %a, %splat) ret %out } define @fadd_d_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fadd_d_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fadd.nxv2f64( %pg, %a_z, %splat) ret %out } define @fmax_h_immzero( %pg, %a) #0 { ; CHECK-LABEL: fmax_h_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv8f16( %pg, %a, %splat) ret %out } define @fmax_h_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fmax_h_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv8f16( %pg, %a_z, %splat) ret %out } define @fmax_h_immone( %pg, %a) #0 { ; CHECK-LABEL: fmax_h_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv8f16( %pg, %a, %splat) ret %out } define @fmax_h_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fmax_h_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv8f16( %pg, %a_z, %splat) ret %out } define @fmax_s_immzero( %pg, %a) #0 { ; CHECK-LABEL: fmax_s_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv4f32( %pg, %a, %splat) ret %out } define @fmax_s_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fmax_s_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv4f32( %pg, %a_z, %splat) ret %out } define @fmax_s_immone( %pg, %a) #0 { ; CHECK-LABEL: fmax_s_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv4f32( %pg, %a, %splat) ret %out } define @fmax_s_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fmax_s_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv4f32( %pg, %a_z, %splat) ret %out } define @fmax_d_immzero( %pg, %a) #0 { ; CHECK-LABEL: fmax_d_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv2f64( %pg, %a, %splat) ret %out } define @fmax_d_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fmax_d_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv2f64( %pg, %a_z, %splat) ret %out } define @fmax_d_immone( %pg, %a) #0 { ; CHECK-LABEL: fmax_d_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv2f64( %pg, %a, %splat) ret %out } define @fmax_d_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fmax_d_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmax.nxv2f64( %pg, %a_z, %splat) ret %out } define @fmaxnm_h_immzero( %pg, %a) #0 { ; CHECK-LABEL: fmaxnm_h_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %pg, %a, %splat) ret %out } define @fmaxnm_h_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fmaxnm_h_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %pg, %a_z, %splat) ret %out } define @fmaxnm_h_immone( %pg, %a) #0 { ; CHECK-LABEL: fmaxnm_h_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %pg, %a, %splat) ret %out } define @fmaxnm_h_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fmaxnm_h_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %pg, %a_z, %splat) ret %out } define @fmaxnm_s_immzero( %pg, %a) #0 { ; CHECK-LABEL: fmaxnm_s_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %pg, %a, %splat) ret %out } define @fmaxnm_s_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fmaxnm_s_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %pg, %a_z, %splat) ret %out } define @fmaxnm_s_immone( %pg, %a) #0 { ; CHECK-LABEL: fmaxnm_s_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %pg, %a, %splat) ret %out } define @fmaxnm_s_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fmaxnm_s_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %pg, %a_z, %splat) ret %out } define @fmaxnm_d_immzero( %pg, %a) #0 { ; CHECK-LABEL: fmaxnm_d_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %pg, %a, %splat) ret %out } define @fmaxnm_d_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fmaxnm_d_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %pg, %a_z, %splat) ret %out } define @fmaxnm_d_immone( %pg, %a) #0 { ; CHECK-LABEL: fmaxnm_d_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %pg, %a, %splat) ret %out } define @fmaxnm_d_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fmaxnm_d_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %pg, %a_z, %splat) ret %out } define @fmin_h_immzero( %pg, %a) #0 { ; CHECK-LABEL: fmin_h_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv8f16( %pg, %a, %splat) ret %out } define @fmin_h_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fmin_h_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv8f16( %pg, %a_z, %splat) ret %out } define @fmin_h_immone( %pg, %a) #0 { ; CHECK-LABEL: fmin_h_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv8f16( %pg, %a, %splat) ret %out } define @fmin_h_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fmin_h_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv8f16( %pg, %a_z, %splat) ret %out } define @fmin_s_immzero( %pg, %a) #0 { ; CHECK-LABEL: fmin_s_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv4f32( %pg, %a, %splat) ret %out } define @fmin_s_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fmin_s_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv4f32( %pg, %a_z, %splat) ret %out } define @fmin_s_immone( %pg, %a) #0 { ; CHECK-LABEL: fmin_s_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv4f32( %pg, %a, %splat) ret %out } define @fmin_s_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fmin_s_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv4f32( %pg, %a_z, %splat) ret %out } define @fmin_d_immzero( %pg, %a) #0 { ; CHECK-LABEL: fmin_d_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv2f64( %pg, %a, %splat) ret %out } define @fmin_d_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fmin_d_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv2f64( %pg, %a_z, %splat) ret %out } define @fmin_d_immone( %pg, %a) #0 { ; CHECK-LABEL: fmin_d_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv2f64( %pg, %a, %splat) ret %out } define @fmin_d_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fmin_d_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmin.nxv2f64( %pg, %a_z, %splat) ret %out } define @fminnm_h_immzero( %pg, %a) #0 { ; CHECK-LABEL: fminnm_h_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv8f16( %pg, %a, %splat) ret %out } define @fminnm_h_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fminnm_h_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv8f16( %pg, %a_z, %splat) ret %out } define @fminnm_h_immone( %pg, %a) #0 { ; CHECK-LABEL: fminnm_h_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv8f16( %pg, %a, %splat) ret %out } define @fminnm_h_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fminnm_h_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv8f16( %pg, %a_z, %splat) ret %out } define @fminnm_s_immzero( %pg, %a) #0 { ; CHECK-LABEL: fminnm_s_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv4f32( %pg, %a, %splat) ret %out } define @fminnm_s_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fminnm_s_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv4f32( %pg, %a_z, %splat) ret %out } define @fminnm_s_immone( %pg, %a) #0 { ; CHECK-LABEL: fminnm_s_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv4f32( %pg, %a, %splat) ret %out } define @fminnm_s_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fminnm_s_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv4f32( %pg, %a_z, %splat) ret %out } define @fminnm_d_immzero( %pg, %a) #0 { ; CHECK-LABEL: fminnm_d_immzero: ; CHECK: // %bb.0: ; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv2f64( %pg, %a, %splat) ret %out } define @fminnm_d_immzero_zero( %pg, %a) #1 { ; CHECK-LABEL: fminnm_d_immzero_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #0.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv2f64( %pg, %a_z, %splat) ret %out } define @fminnm_d_immone( %pg, %a) #0 { ; CHECK-LABEL: fminnm_d_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv2f64( %pg, %a, %splat) ret %out } define @fminnm_d_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fminnm_d_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fminnm.nxv2f64( %pg, %a_z, %splat) ret %out } define @fmul_h_immhalf( %pg, %a) #0 { ; CHECK-LABEL: fmul_h_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv8f16( %pg, %a, %splat) ret %out } define @fmul_h_immhalf_zero( %pg, %a) #1 { ; CHECK-LABEL: fmul_h_immhalf_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv8f16( %pg, %a_z, %splat) ret %out } define @fmul_h_immtwo( %pg, %a) #0 { ; CHECK-LABEL: fmul_h_immtwo: ; CHECK: // %bb.0: ; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #2.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 2.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv8f16( %pg, %a, %splat) ret %out } define @fmul_h_immtwo_zero( %pg, %a) #1 { ; CHECK-LABEL: fmul_h_immtwo_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #2.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 2.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv8f16( %pg, %a_z, %splat) ret %out } define @fmul_s_immhalf( %pg, %a) #0 { ; CHECK-LABEL: fmul_s_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv4f32( %pg, %a, %splat) ret %out } define @fmul_s_immhalf_zero( %pg, %a) #1 { ; CHECK-LABEL: fmul_s_immhalf_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv4f32( %pg, %a_z, %splat) ret %out } define @fmul_s_immtwo( %pg, %a) #0 { ; CHECK-LABEL: fmul_s_immtwo: ; CHECK: // %bb.0: ; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #2.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 2.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv4f32( %pg, %a, %splat) ret %out } define @fmul_s_immtwo_zero( %pg, %a) #1 { ; CHECK-LABEL: fmul_s_immtwo_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #2.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 2.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv4f32( %pg, %a_z, %splat) ret %out } define @fmul_d_immhalf( %pg, %a) #0 { ; CHECK-LABEL: fmul_d_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv2f64( %pg, %a, %splat) ret %out } define @fmul_d_immhalf_zero( %pg, %a) #1 { ; CHECK-LABEL: fmul_d_immhalf_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv2f64( %pg, %a_z, %splat) ret %out } define @fmul_d_immtwo( %pg, %a) #0 { ; CHECK-LABEL: fmul_d_immtwo: ; CHECK: // %bb.0: ; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #2.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 2.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv2f64( %pg, %a, %splat) ret %out } define @fmul_d_immtwo_zero( %pg, %a) #1 { ; CHECK-LABEL: fmul_d_immtwo_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #2.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 2.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fmul.nxv2f64( %pg, %a_z, %splat) ret %out } define @fsub_h_immhalf( %pg, %a) #0 { ; CHECK-LABEL: fsub_h_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv8f16( %pg, %a, %splat) ret %out } define @fsub_h_immhalf_zero( %pg, %a) #1 { ; CHECK-LABEL: fsub_h_immhalf_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv8f16( %pg, %a_z, %splat) ret %out } define @fsub_h_immone( %pg, %a) #0 { ; CHECK-LABEL: fsub_h_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv8f16( %pg, %a, %splat) ret %out } define @fsub_h_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fsub_h_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv8f16( %pg, %a_z, %splat) ret %out } define @fsub_s_immhalf( %pg, %a) #0 { ; CHECK-LABEL: fsub_s_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv4f32( %pg, %a, %splat) ret %out } define @fsub_s_immhalf_zero( %pg, %a) #1 { ; CHECK-LABEL: fsub_s_immhalf_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv4f32( %pg, %a_z, %splat) ret %out } define @fsub_s_immone( %pg, %a) #0 { ; CHECK-LABEL: fsub_s_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv4f32( %pg, %a, %splat) ret %out } define @fsub_s_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fsub_s_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv4f32( %pg, %a_z, %splat) ret %out } define @fsub_d_immhalf( %pg, %a) #0 { ; CHECK-LABEL: fsub_d_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv2f64( %pg, %a, %splat) ret %out } define @fsub_d_immhalf_zero( %pg, %a) #1 { ; CHECK-LABEL: fsub_d_immhalf_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv2f64( %pg, %a_z, %splat) ret %out } define @fsub_d_immone( %pg, %a) #0 { ; CHECK-LABEL: fsub_d_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv2f64( %pg, %a, %splat) ret %out } define @fsub_d_immone_zero( %pg, %a) #1 { ; CHECK-LABEL: fsub_d_immone_zero: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsub.nxv2f64( %pg, %a_z, %splat) ret %out } define @fsubr_h_immhalf( %pg, %a) #1 { ; CHECK-LABEL: fsubr_h_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, half 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsubr.nxv8f16( %pg, %a_z, %splat) ret %out } define @fsubr_h_immone( %pg, %a) #1 { ; CHECK-LABEL: fsubr_h_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.h, p0/z, z0.h ; CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, half 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsubr.nxv8f16( %pg, %a_z, %splat) ret %out } define @fsubr_s_immhalf( %pg, %a) #1 { ; CHECK-LABEL: fsubr_s_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fsubr z0.s, p0/m, z0.s, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, float 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsubr.nxv4f32( %pg, %a_z, %splat) ret %out } define @fsubr_s_immone( %pg, %a) #1 { ; CHECK-LABEL: fsubr_s_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.s, p0/z, z0.s ; CHECK-NEXT: fsubr z0.s, p0/m, z0.s, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, float 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsubr.nxv4f32( %pg, %a_z, %splat) ret %out } define @fsubr_d_immhalf( %pg, %a) #1 { ; CHECK-LABEL: fsubr_d_immhalf: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fsubr z0.d, p0/m, z0.d, #0.5 ; CHECK-NEXT: ret %elt = insertelement undef, double 0.500000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsubr.nxv2f64( %pg, %a_z, %splat) ret %out } define @fsubr_d_immone( %pg, %a) #1 { ; CHECK-LABEL: fsubr_d_immone: ; CHECK: // %bb.0: ; CHECK-NEXT: movprfx z0.d, p0/z, z0.d ; CHECK-NEXT: fsubr z0.d, p0/m, z0.d, #1.0 ; CHECK-NEXT: ret %elt = insertelement undef, double 1.000000e+00, i32 0 %splat = shufflevector %elt, undef, zeroinitializer %a_z = select %pg, %a, zeroinitializer %out = call @llvm.aarch64.sve.fsubr.nxv2f64( %pg, %a_z, %splat) ret %out } ;; Arithmetic intrinsic declarations declare @llvm.aarch64.sve.fadd.nxv8f16(, , ) declare @llvm.aarch64.sve.fadd.nxv4f32(, , ) declare @llvm.aarch64.sve.fadd.nxv2f64(, , ) declare @llvm.aarch64.sve.fmax.nxv8f16(, , ) declare @llvm.aarch64.sve.fmax.nxv4f32(, , ) declare @llvm.aarch64.sve.fmax.nxv2f64(, , ) declare @llvm.aarch64.sve.fmaxnm.nxv8f16(, , ) declare @llvm.aarch64.sve.fmaxnm.nxv4f32(, , ) declare @llvm.aarch64.sve.fmaxnm.nxv2f64(, , ) declare @llvm.aarch64.sve.fmin.nxv8f16(, , ) declare @llvm.aarch64.sve.fmin.nxv4f32(, , ) declare @llvm.aarch64.sve.fmin.nxv2f64(, , ) declare @llvm.aarch64.sve.fminnm.nxv8f16(, , ) declare @llvm.aarch64.sve.fminnm.nxv4f32(, , ) declare @llvm.aarch64.sve.fminnm.nxv2f64(, , ) declare @llvm.aarch64.sve.fmul.nxv8f16(, , ) declare @llvm.aarch64.sve.fmul.nxv4f32(, , ) declare @llvm.aarch64.sve.fmul.nxv2f64(, , ) declare @llvm.aarch64.sve.fsub.nxv8f16(, , ) declare @llvm.aarch64.sve.fsub.nxv4f32(, , ) declare @llvm.aarch64.sve.fsub.nxv2f64(, , ) declare @llvm.aarch64.sve.fsubr.nxv8f16(, , ) declare @llvm.aarch64.sve.fsubr.nxv4f32(, , ) declare @llvm.aarch64.sve.fsubr.nxv2f64(, , ) attributes #0 = { "target-features"="+sve" } attributes #1 = { "target-features"="+sve,+use-experimental-zeroing-pseudos" }