; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s ; ; LD1H, LD1W, LD1D: base + 64-bit scaled offset ; e.g. ld1h z0.d, p0/z, [x0, z0.d, lsl #1] ; define @gld1h_index( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1h_index: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1h { z0.d }, p0/z, [x0, z0.d, lsl #1] ; CHECK-NEXT: ret %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %pg, ptr %base, %b) %res = zext %load to ret %res } define @gld1w_index( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1w_index: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1w { z0.d }, p0/z, [x0, z0.d, lsl #2] ; CHECK-NEXT: ret %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %pg, ptr %base, %b) %res = zext %load to ret %res } define @gld1d_index( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1d_index: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, z0.d, lsl #3] ; CHECK-NEXT: ret %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( %pg, ptr %base, %b) ret %load } define @gld1d_index_double( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1d_index_double: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, z0.d, lsl #3] ; CHECK-NEXT: ret %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( %pg, ptr %base, %b) ret %load } ; ; LD1SH, LD1SW: base + 64-bit scaled offset ; e.g. ld1sh z0.d, p0/z, [x0, z0.d, lsl #1] ; define @gld1sh_index( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1sh_index: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1sh { z0.d }, p0/z, [x0, z0.d, lsl #1] ; CHECK-NEXT: ret %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %pg, ptr %base, %b) %res = sext %load to ret %res } define @gld1sw_index( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1sw_index: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1sw { z0.d }, p0/z, [x0, z0.d, lsl #2] ; CHECK-NEXT: ret %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %pg, ptr %base, %b) %res = sext %load to ret %res } ; ; LD1H, LD1W, LD1D: base + 64-bit sxtw'd scaled offset ; e.g. ld1h z0.d, p0/z, [x0, z0.d, sxtw #1] ; define @gld1h_index_sxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1h_index_sxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1] ; CHECK-NEXT: ret %sxtw = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %pg, ptr %base, %sxtw) %res = zext %load to ret %res } define @gld1w_index_sxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1w_index_sxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2] ; CHECK-NEXT: ret %sxtw = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %pg, ptr %base, %sxtw) %res = zext %load to ret %res } define @gld1d_index_sxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1d_index_sxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, z0.d, sxtw #3] ; CHECK-NEXT: ret %sxtw = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( %pg, ptr %base, %sxtw) ret %load } define @gld1d_index_double_sxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1d_index_double_sxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, z0.d, sxtw #3] ; CHECK-NEXT: ret %sxtw = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( %pg, ptr %base, %sxtw) ret %load } ; ; LD1SH, LD1SW: base + 64-bit sxtw'd scaled offset ; e.g. ld1sh z0.d, p0/z, [x0, z0.d, sxtw #1] ; define @gld1sh_index_sxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1sh_index_sxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1] ; CHECK-NEXT: ret %sxtw = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %pg, ptr %base, %sxtw) %res = sext %load to ret %res } define @gld1sw_index_sxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1sw_index_sxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2] ; CHECK-NEXT: ret %sxtw = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %pg, ptr %base, %sxtw) %res = sext %load to ret %res } ; ; LD1H, LD1W, LD1D: base + 64-bit sxtw'd scaled offset ; e.g. ld1h z0.d, p0/z, [x0, z0.d, uxtw #1] ; define @gld1h_index_uxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1h_index_uxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1h { z0.d }, p0/z, [x0, z0.d, uxtw #1] ; CHECK-NEXT: ret %uxtw = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %pg, ptr %base, %uxtw) %res = zext %load to ret %res } define @gld1w_index_uxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1w_index_uxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1w { z0.d }, p0/z, [x0, z0.d, uxtw #2] ; CHECK-NEXT: ret %uxtw = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %pg, ptr %base, %uxtw) %res = zext %load to ret %res } define @gld1d_index_uxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1d_index_uxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, z0.d, uxtw #3] ; CHECK-NEXT: ret %uxtw = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( %pg, ptr %base, %uxtw) ret %load } define @gld1d_index_double_uxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1d_index_double_uxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, z0.d, uxtw #3] ; CHECK-NEXT: ret %uxtw = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( %pg, ptr %base, %uxtw) ret %load } ; ; LD1SH, LD1SW: base + 64-bit uxtw'd scaled offset ; e.g. ld1sh z0.d, p0/z, [x0, z0.d, uxtw #1] ; define @gld1sh_index_uxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1sh_index_uxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1] ; CHECK-NEXT: ret %uxtw = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %pg, ptr %base, %uxtw) %res = sext %load to ret %res } define @gld1sw_index_uxtw( %pg, ptr %base, %b) { ; CHECK-LABEL: gld1sw_index_uxtw: ; CHECK: // %bb.0: ; CHECK-NEXT: ld1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2] ; CHECK-NEXT: ret %uxtw = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, %pg, %b) %load = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %pg, ptr %base, %uxtw) %res = sext %load to ret %res } declare @llvm.aarch64.sve.ld1.gather.index.nxv2i16(, ptr, ) declare @llvm.aarch64.sve.ld1.gather.index.nxv2i32(, ptr, ) declare @llvm.aarch64.sve.ld1.gather.index.nxv2i64(, ptr, ) declare @llvm.aarch64.sve.ld1.gather.index.nxv2f64(, ptr, ) declare @llvm.aarch64.sve.sxtw.nxv2i64(, , ) declare @llvm.aarch64.sve.uxtw.nxv2i64(, , )