; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 ; RUN: llc -mtriple=aarch64 -mattr=+sve2 -verify-machineinstrs %s -o - | FileCheck %s define @add_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: add_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: add z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = add %x, %y %b = select %c, %a, %x ret %b } define @add_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: add_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: add z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = add %x, %y %b = select %c, %a, %x ret %b } define @add_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: add_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: add z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = add %x, %y %b = select %c, %a, %x ret %b } define @add_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: add_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: add z0.b, p0/m, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = add %x, %y %b = select %c, %a, %x ret %b } define @sub_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: sub_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: sub z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sub %x, %y %b = select %c, %a, %x ret %b } define @sub_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: sub_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: sub z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sub %x, %y %b = select %c, %a, %x ret %b } define @sub_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: sub_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: sub z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sub %x, %y %b = select %c, %a, %x ret %b } define @sub_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: sub_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: sub z0.b, p0/m, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sub %x, %y %b = select %c, %a, %x ret %b } define @mul_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: mul_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: mul z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = mul %x, %y %b = select %c, %a, %x ret %b } define @mul_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: mul_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: mul z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = mul %x, %y %b = select %c, %a, %x ret %b } define @mul_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: mul_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: mul z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = mul %x, %y %b = select %c, %a, %x ret %b } define @mul_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: mul_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: mul z0.b, p0/m, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = mul %x, %y %b = select %c, %a, %x ret %b } define @sdiv_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: sdiv_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: sdivr z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: mov z0.d, p0/m, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sdiv %x, %y %b = select %c, %a, %x ret %b } define @sdiv_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: sdiv_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sdivr z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: mov z0.s, p0/m, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sdiv %x, %y %b = select %c, %a, %x ret %b } define @sdiv_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: sdiv_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sunpkhi z3.s, z1.h ; CHECK-NEXT: sunpkhi z4.s, z0.h ; CHECK-NEXT: sunpklo z1.s, z1.h ; CHECK-NEXT: sdivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: sunpklo z4.s, z0.h ; CHECK-NEXT: sdivr z1.s, p0/m, z1.s, z4.s ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: uzp1 z1.h, z1.h, z3.h ; CHECK-NEXT: mov z0.h, p0/m, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sdiv %x, %y %b = select %c, %a, %x ret %b } define @sdiv_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: sdiv_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: sunpkhi z3.h, z1.b ; CHECK-NEXT: sunpkhi z4.h, z0.b ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sunpklo z1.h, z1.b ; CHECK-NEXT: sunpkhi z5.s, z3.h ; CHECK-NEXT: sunpkhi z6.s, z4.h ; CHECK-NEXT: sunpklo z3.s, z3.h ; CHECK-NEXT: sunpklo z4.s, z4.h ; CHECK-NEXT: sdivr z5.s, p0/m, z5.s, z6.s ; CHECK-NEXT: sunpkhi z6.s, z1.h ; CHECK-NEXT: sunpklo z1.s, z1.h ; CHECK-NEXT: sdivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: sunpklo z4.h, z0.b ; CHECK-NEXT: sunpkhi z7.s, z4.h ; CHECK-NEXT: sunpklo z4.s, z4.h ; CHECK-NEXT: sdivr z6.s, p0/m, z6.s, z7.s ; CHECK-NEXT: uzp1 z3.h, z3.h, z5.h ; CHECK-NEXT: sdivr z1.s, p0/m, z1.s, z4.s ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: uzp1 z1.h, z1.h, z6.h ; CHECK-NEXT: uzp1 z1.b, z1.b, z3.b ; CHECK-NEXT: mov z0.b, p0/m, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sdiv %x, %y %b = select %c, %a, %x ret %b } define @udiv_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: udiv_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: udivr z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: mov z0.d, p0/m, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = udiv %x, %y %b = select %c, %a, %x ret %b } define @udiv_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: udiv_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: udivr z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: mov z0.s, p0/m, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = udiv %x, %y %b = select %c, %a, %x ret %b } define @udiv_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: udiv_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: uunpkhi z3.s, z1.h ; CHECK-NEXT: uunpkhi z4.s, z0.h ; CHECK-NEXT: uunpklo z1.s, z1.h ; CHECK-NEXT: udivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: uunpklo z4.s, z0.h ; CHECK-NEXT: udivr z1.s, p0/m, z1.s, z4.s ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: uzp1 z1.h, z1.h, z3.h ; CHECK-NEXT: mov z0.h, p0/m, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = udiv %x, %y %b = select %c, %a, %x ret %b } define @udiv_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: udiv_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: uunpkhi z3.h, z1.b ; CHECK-NEXT: uunpkhi z4.h, z0.b ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: uunpklo z1.h, z1.b ; CHECK-NEXT: uunpkhi z5.s, z3.h ; CHECK-NEXT: uunpkhi z6.s, z4.h ; CHECK-NEXT: uunpklo z3.s, z3.h ; CHECK-NEXT: uunpklo z4.s, z4.h ; CHECK-NEXT: udivr z5.s, p0/m, z5.s, z6.s ; CHECK-NEXT: uunpkhi z6.s, z1.h ; CHECK-NEXT: uunpklo z1.s, z1.h ; CHECK-NEXT: udivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: uunpklo z4.h, z0.b ; CHECK-NEXT: uunpkhi z7.s, z4.h ; CHECK-NEXT: uunpklo z4.s, z4.h ; CHECK-NEXT: udivr z6.s, p0/m, z6.s, z7.s ; CHECK-NEXT: uzp1 z3.h, z3.h, z5.h ; CHECK-NEXT: udivr z1.s, p0/m, z1.s, z4.s ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: uzp1 z1.h, z1.h, z6.h ; CHECK-NEXT: uzp1 z1.b, z1.b, z3.b ; CHECK-NEXT: mov z0.b, p0/m, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = udiv %x, %y %b = select %c, %a, %x ret %b } define @srem_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: srem_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: movprfx z3, z0 ; CHECK-NEXT: sdiv z3.d, p0/m, z3.d, z1.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: mls z0.d, p0/m, z3.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = srem %x, %y %b = select %c, %a, %x ret %b } define @srem_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: srem_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: movprfx z3, z0 ; CHECK-NEXT: sdiv z3.s, p0/m, z3.s, z1.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: mls z0.s, p0/m, z3.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = srem %x, %y %b = select %c, %a, %x ret %b } define @srem_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: srem_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sunpkhi z3.s, z1.h ; CHECK-NEXT: sunpkhi z4.s, z0.h ; CHECK-NEXT: sunpklo z5.s, z0.h ; CHECK-NEXT: sdivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: sunpklo z4.s, z1.h ; CHECK-NEXT: sdivr z4.s, p0/m, z4.s, z5.s ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: uzp1 z3.h, z4.h, z3.h ; CHECK-NEXT: mls z0.h, p0/m, z3.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = srem %x, %y %b = select %c, %a, %x ret %b } define @srem_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: srem_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: sunpkhi z3.h, z1.b ; CHECK-NEXT: sunpkhi z4.h, z0.b ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sunpkhi z5.s, z3.h ; CHECK-NEXT: sunpkhi z6.s, z4.h ; CHECK-NEXT: sunpklo z3.s, z3.h ; CHECK-NEXT: sunpklo z4.s, z4.h ; CHECK-NEXT: sdivr z5.s, p0/m, z5.s, z6.s ; CHECK-NEXT: sunpklo z6.h, z0.b ; CHECK-NEXT: sunpkhi z24.s, z6.h ; CHECK-NEXT: sunpklo z6.s, z6.h ; CHECK-NEXT: sdivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: sunpklo z4.h, z1.b ; CHECK-NEXT: sunpkhi z7.s, z4.h ; CHECK-NEXT: sunpklo z4.s, z4.h ; CHECK-NEXT: sdivr z7.s, p0/m, z7.s, z24.s ; CHECK-NEXT: uzp1 z3.h, z3.h, z5.h ; CHECK-NEXT: sdivr z4.s, p0/m, z4.s, z6.s ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: uzp1 z4.h, z4.h, z7.h ; CHECK-NEXT: uzp1 z3.b, z4.b, z3.b ; CHECK-NEXT: mls z0.b, p0/m, z3.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = srem %x, %y %b = select %c, %a, %x ret %b } define @urem_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: urem_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: movprfx z3, z0 ; CHECK-NEXT: udiv z3.d, p0/m, z3.d, z1.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: mls z0.d, p0/m, z3.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = urem %x, %y %b = select %c, %a, %x ret %b } define @urem_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: urem_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: movprfx z3, z0 ; CHECK-NEXT: udiv z3.s, p0/m, z3.s, z1.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: mls z0.s, p0/m, z3.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = urem %x, %y %b = select %c, %a, %x ret %b } define @urem_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: urem_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: uunpkhi z3.s, z1.h ; CHECK-NEXT: uunpkhi z4.s, z0.h ; CHECK-NEXT: uunpklo z5.s, z0.h ; CHECK-NEXT: udivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: uunpklo z4.s, z1.h ; CHECK-NEXT: udivr z4.s, p0/m, z4.s, z5.s ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: uzp1 z3.h, z4.h, z3.h ; CHECK-NEXT: mls z0.h, p0/m, z3.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = urem %x, %y %b = select %c, %a, %x ret %b } define @urem_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: urem_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: uunpkhi z3.h, z1.b ; CHECK-NEXT: uunpkhi z4.h, z0.b ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: uunpkhi z5.s, z3.h ; CHECK-NEXT: uunpkhi z6.s, z4.h ; CHECK-NEXT: uunpklo z3.s, z3.h ; CHECK-NEXT: uunpklo z4.s, z4.h ; CHECK-NEXT: udivr z5.s, p0/m, z5.s, z6.s ; CHECK-NEXT: uunpklo z6.h, z0.b ; CHECK-NEXT: uunpkhi z24.s, z6.h ; CHECK-NEXT: uunpklo z6.s, z6.h ; CHECK-NEXT: udivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: uunpklo z4.h, z1.b ; CHECK-NEXT: uunpkhi z7.s, z4.h ; CHECK-NEXT: uunpklo z4.s, z4.h ; CHECK-NEXT: udivr z7.s, p0/m, z7.s, z24.s ; CHECK-NEXT: uzp1 z3.h, z3.h, z5.h ; CHECK-NEXT: udivr z4.s, p0/m, z4.s, z6.s ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: uzp1 z4.h, z4.h, z7.h ; CHECK-NEXT: uzp1 z3.b, z4.b, z3.b ; CHECK-NEXT: mls z0.b, p0/m, z3.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = urem %x, %y %b = select %c, %a, %x ret %b } define @and_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: and_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: and z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = and %x, %y %b = select %c, %a, %x ret %b } define @and_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: and_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: and z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = and %x, %y %b = select %c, %a, %x ret %b } define @and_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: and_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: and z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = and %x, %y %b = select %c, %a, %x ret %b } define @and_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: and_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: and z0.b, p0/m, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = and %x, %y %b = select %c, %a, %x ret %b } define @or_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: or_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: orr z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = or %x, %y %b = select %c, %a, %x ret %b } define @or_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: or_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: orr z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = or %x, %y %b = select %c, %a, %x ret %b } define @or_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: or_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: orr z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = or %x, %y %b = select %c, %a, %x ret %b } define @or_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: or_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: orr z0.b, p0/m, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = or %x, %y %b = select %c, %a, %x ret %b } define @xor_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: xor_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: eor z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = xor %x, %y %b = select %c, %a, %x ret %b } define @xor_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: xor_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: eor z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = xor %x, %y %b = select %c, %a, %x ret %b } define @xor_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: xor_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: eor z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = xor %x, %y %b = select %c, %a, %x ret %b } define @xor_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: xor_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: eor z0.b, p0/m, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = xor %x, %y %b = select %c, %a, %x ret %b } define @shl_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: shl_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p1.d, p0/z, z2.d, #0 ; CHECK-NEXT: lslr z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, p1/m, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = shl %x, %y %b = select %c, %a, %x ret %b } define @shl_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: shl_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p1.s, p0/z, z2.s, #0 ; CHECK-NEXT: lslr z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.s, p1/m, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = shl %x, %y %b = select %c, %a, %x ret %b } define @shl_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: shl_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p1.h, p0/z, z2.h, #0 ; CHECK-NEXT: lslr z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.h, p1/m, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = shl %x, %y %b = select %c, %a, %x ret %b } define @shl_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: shl_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p1.b, p0/z, z2.b, #0 ; CHECK-NEXT: lslr z1.b, p0/m, z1.b, z0.b ; CHECK-NEXT: mov z0.b, p1/m, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = shl %x, %y %b = select %c, %a, %x ret %b } define @ashr_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: ashr_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p1.d, p0/z, z2.d, #0 ; CHECK-NEXT: asrr z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, p1/m, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = ashr %x, %y %b = select %c, %a, %x ret %b } define @ashr_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: ashr_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p1.s, p0/z, z2.s, #0 ; CHECK-NEXT: asrr z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.s, p1/m, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = ashr %x, %y %b = select %c, %a, %x ret %b } define @ashr_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: ashr_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p1.h, p0/z, z2.h, #0 ; CHECK-NEXT: asrr z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.h, p1/m, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = ashr %x, %y %b = select %c, %a, %x ret %b } define @ashr_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: ashr_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p1.b, p0/z, z2.b, #0 ; CHECK-NEXT: asrr z1.b, p0/m, z1.b, z0.b ; CHECK-NEXT: mov z0.b, p1/m, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = ashr %x, %y %b = select %c, %a, %x ret %b } define @lshr_nxv2i64_x( %x, %y, %n) { ; CHECK-LABEL: lshr_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p1.d, p0/z, z2.d, #0 ; CHECK-NEXT: lsrr z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, p1/m, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = lshr %x, %y %b = select %c, %a, %x ret %b } define @lshr_nxv4i32_x( %x, %y, %n) { ; CHECK-LABEL: lshr_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p1.s, p0/z, z2.s, #0 ; CHECK-NEXT: lsrr z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.s, p1/m, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = lshr %x, %y %b = select %c, %a, %x ret %b } define @lshr_nxv8i16_x( %x, %y, %n) { ; CHECK-LABEL: lshr_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p1.h, p0/z, z2.h, #0 ; CHECK-NEXT: lsrr z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.h, p1/m, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = lshr %x, %y %b = select %c, %a, %x ret %b } define @lshr_nxv16i8_x( %x, %y, %n) { ; CHECK-LABEL: lshr_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p1.b, p0/z, z2.b, #0 ; CHECK-NEXT: lsrr z1.b, p0/m, z1.b, z0.b ; CHECK-NEXT: mov z0.b, p1/m, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = lshr %x, %y %b = select %c, %a, %x ret %b } define @mla_nxv2i64_x( %x, %y, %z, %n) { ; CHECK-LABEL: mla_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z3.d, #0 ; CHECK-NEXT: mla z0.d, p0/m, z1.d, z2.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %y, %z %a = add %x, %m %b = select %c, %a, %x ret %b } define @mla_nxv4i32_x( %x, %y, %z, %n) { ; CHECK-LABEL: mla_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z3.s, #0 ; CHECK-NEXT: mla z0.s, p0/m, z1.s, z2.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %y, %z %a = add %x, %m %b = select %c, %a, %x ret %b } define @mla_nxv8i16_x( %x, %y, %z, %n) { ; CHECK-LABEL: mla_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z3.h, #0 ; CHECK-NEXT: mla z0.h, p0/m, z1.h, z2.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %y, %z %a = add %x, %m %b = select %c, %a, %x ret %b } define @mla_nxv16i8_x( %x, %y, %z, %n) { ; CHECK-LABEL: mla_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z3.b, #0 ; CHECK-NEXT: mla z0.b, p0/m, z1.b, z2.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %y, %z %a = add %x, %m %b = select %c, %a, %x ret %b } define @mls_nxv2i64_x( %x, %y, %z, %n) { ; CHECK-LABEL: mls_nxv2i64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z3.d, #0 ; CHECK-NEXT: msb z0.d, p0/m, z1.d, z2.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %x, %y %a = sub %z, %m %b = select %c, %a, %x ret %b } define @mls_nxv4i32_x( %x, %y, %z, %n) { ; CHECK-LABEL: mls_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z3.s, #0 ; CHECK-NEXT: msb z0.s, p0/m, z1.s, z2.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %x, %y %a = sub %z, %m %b = select %c, %a, %x ret %b } define @mls_nxv8i16_x( %x, %y, %z, %n) { ; CHECK-LABEL: mls_nxv8i16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z3.h, #0 ; CHECK-NEXT: msb z0.h, p0/m, z1.h, z2.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %x, %y %a = sub %z, %m %b = select %c, %a, %x ret %b } define @mls_nxv16i8_x( %x, %y, %z, %n) { ; CHECK-LABEL: mls_nxv16i8_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z3.b, #0 ; CHECK-NEXT: msb z0.b, p0/m, z1.b, z2.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %x, %y %a = sub %z, %m %b = select %c, %a, %x ret %b } define @fadd_nxv4f32_x( %x, %y, %n) { ; CHECK-LABEL: fadd_nxv4f32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fadd z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fadd %x, %y %b = select %c, %a, %x ret %b } define @fadd_nxv8f16_x( %x, %y, %n) { ; CHECK-LABEL: fadd_nxv8f16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fadd z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fadd %x, %y %b = select %c, %a, %x ret %b } define @fadd_nxv2f64_x( %x, %y, %n) { ; CHECK-LABEL: fadd_nxv2f64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fadd z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fadd %x, %y %b = select %c, %a, %x ret %b } define @fsub_nxv4f32_x( %x, %y, %n) { ; CHECK-LABEL: fsub_nxv4f32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fsub z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fsub %x, %y %b = select %c, %a, %x ret %b } define @fsub_nxv8f16_x( %x, %y, %n) { ; CHECK-LABEL: fsub_nxv8f16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fsub z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fsub %x, %y %b = select %c, %a, %x ret %b } define @fsub_nxv2f64_x( %x, %y, %n) { ; CHECK-LABEL: fsub_nxv2f64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fsub z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fsub %x, %y %b = select %c, %a, %x ret %b } define @fmul_nxv4f32_x( %x, %y, %n) { ; CHECK-LABEL: fmul_nxv4f32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmul z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fmul %x, %y %b = select %c, %a, %x ret %b } define @fmul_nxv8f16_x( %x, %y, %n) { ; CHECK-LABEL: fmul_nxv8f16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmul z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fmul %x, %y %b = select %c, %a, %x ret %b } define @fmul_nxv2f64_x( %x, %y, %n) { ; CHECK-LABEL: fmul_nxv2f64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmul z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fmul %x, %y %b = select %c, %a, %x ret %b } define @fdiv_nxv4f32_x( %x, %y, %n) { ; CHECK-LABEL: fdiv_nxv4f32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fdivr z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: mov z0.s, p0/m, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fdiv %x, %y %b = select %c, %a, %x ret %b } define @fdiv_nxv8f16_x( %x, %y, %n) { ; CHECK-LABEL: fdiv_nxv8f16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: fdivr z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: mov z0.h, p0/m, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fdiv %x, %y %b = select %c, %a, %x ret %b } define @fdiv_nxv2f64_x( %x, %y, %n) { ; CHECK-LABEL: fdiv_nxv2f64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fdivr z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: mov z0.d, p0/m, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fdiv %x, %y %b = select %c, %a, %x ret %b } define @minnum_nxv4f32_x( %x, %y, %n) { ; CHECK-LABEL: minnum_nxv4f32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minnum.nxv4f32( %x, %y) %b = select %c, %a, %x ret %b } define @minnum_nxv8f16_x( %x, %y, %n) { ; CHECK-LABEL: minnum_nxv8f16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minnum.nxv8f16( %x, %y) %b = select %c, %a, %x ret %b } define @minnum_nxv2f64_x( %x, %y, %n) { ; CHECK-LABEL: minnum_nxv2f64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minnum.nxv2f64( %x, %y) %b = select %c, %a, %x ret %b } define @maxnum_nxv4f32_x( %x, %y, %n) { ; CHECK-LABEL: maxnum_nxv4f32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maxnum.nxv4f32( %x, %y) %b = select %c, %a, %x ret %b } define @maxnum_nxv8f16_x( %x, %y, %n) { ; CHECK-LABEL: maxnum_nxv8f16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maxnum.nxv8f16( %x, %y) %b = select %c, %a, %x ret %b } define @maxnum_nxv2f64_x( %x, %y, %n) { ; CHECK-LABEL: maxnum_nxv2f64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maxnum.nxv2f64( %x, %y) %b = select %c, %a, %x ret %b } define @minimum_nxv4f32_x( %x, %y, %n) { ; CHECK-LABEL: minimum_nxv4f32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmin z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minimum.nxv4f32( %x, %y) %b = select %c, %a, %x ret %b } define @minimum_nxv8f16_x( %x, %y, %n) { ; CHECK-LABEL: minimum_nxv8f16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmin z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minimum.nxv8f16( %x, %y) %b = select %c, %a, %x ret %b } define @minimum_nxv2f64_x( %x, %y, %n) { ; CHECK-LABEL: minimum_nxv2f64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmin z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minimum.nxv2f64( %x, %y) %b = select %c, %a, %x ret %b } define @maximum_nxv4f32_x( %x, %y, %n) { ; CHECK-LABEL: maximum_nxv4f32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmax z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maximum.nxv4f32( %x, %y) %b = select %c, %a, %x ret %b } define @maximum_nxv8f16_x( %x, %y, %n) { ; CHECK-LABEL: maximum_nxv8f16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmax z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maximum.nxv8f16( %x, %y) %b = select %c, %a, %x ret %b } define @maximum_nxv2f64_x( %x, %y, %n) { ; CHECK-LABEL: maximum_nxv2f64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmax z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maximum.nxv2f64( %x, %y) %b = select %c, %a, %x ret %b } define @fmai_nxv4f32_x( %x, %y, %z, %n) { ; CHECK-LABEL: fmai_nxv4f32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z3.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmla z0.s, p0/m, z1.s, z2.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.fma.nxv4f32( %y, %z, %x) %b = select %c, %a, %x ret %b } define @fmai_nxv8f16_x( %x, %y, %z, %n) { ; CHECK-LABEL: fmai_nxv8f16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z3.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.fma.nxv8f16( %y, %z, %x) %b = select %c, %a, %x ret %b } define @fmai_nxv2f64_x( %x, %y, %z, %n) { ; CHECK-LABEL: fmai_nxv2f64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z3.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmla z0.d, p0/m, z1.d, z2.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.fma.nxv2f64( %y, %z, %x) %b = select %c, %a, %x ret %b } define @fma_nxv4f32_x( %x, %y, %z, %n) { ; CHECK-LABEL: fma_nxv4f32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z3.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmla z0.s, p0/m, z1.s, z2.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %m = fmul fast %y, %z %a = fadd fast %m, %x %b = select %c, %a, %x ret %b } define @fma_nxv8f16_x( %x, %y, %z, %n) { ; CHECK-LABEL: fma_nxv8f16_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z3.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %m = fmul fast %y, %z %a = fadd fast %m, %x %b = select %c, %a, %x ret %b } define @fma_nxv2f64_x( %x, %y, %z, %n) { ; CHECK-LABEL: fma_nxv2f64_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z3.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmla z0.d, p0/m, z1.d, z2.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %m = fmul fast %y, %z %a = fadd fast %m, %x %b = select %c, %a, %x ret %b } define @add_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: add_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: add z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = add %x, %y %b = select %c, %a, %y ret %b } define @add_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: add_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: add z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = add %x, %y %b = select %c, %a, %y ret %b } define @add_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: add_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: add z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = add %x, %y %b = select %c, %a, %y ret %b } define @add_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: add_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: add z1.b, p0/m, z1.b, z0.b ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = add %x, %y %b = select %c, %a, %y ret %b } define @sub_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: sub_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: sub z0.d, z0.d, z1.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sub %x, %y %b = select %c, %a, %y ret %b } define @sub_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: sub_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sub z0.s, z0.s, z1.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sub %x, %y %b = select %c, %a, %y ret %b } define @sub_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: sub_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: sub z0.h, z0.h, z1.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sub %x, %y %b = select %c, %a, %y ret %b } define @sub_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: sub_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: sub z0.b, z0.b, z1.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: sel z0.b, p0, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sub %x, %y %b = select %c, %a, %y ret %b } define @mul_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: mul_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: mul z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = mul %x, %y %b = select %c, %a, %y ret %b } define @mul_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: mul_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: mul z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = mul %x, %y %b = select %c, %a, %y ret %b } define @mul_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: mul_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: mul z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = mul %x, %y %b = select %c, %a, %y ret %b } define @mul_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: mul_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: mul z1.b, p0/m, z1.b, z0.b ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = mul %x, %y %b = select %c, %a, %y ret %b } define @sdiv_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: sdiv_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: sdiv z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sdiv %x, %y %b = select %c, %a, %y ret %b } define @sdiv_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: sdiv_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sdiv z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sdiv %x, %y %b = select %c, %a, %y ret %b } define @sdiv_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: sdiv_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sunpkhi z3.s, z1.h ; CHECK-NEXT: sunpkhi z4.s, z0.h ; CHECK-NEXT: sunpklo z0.s, z0.h ; CHECK-NEXT: sdivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: sunpklo z4.s, z1.h ; CHECK-NEXT: sdiv z0.s, p0/m, z0.s, z4.s ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: uzp1 z0.h, z0.h, z3.h ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sdiv %x, %y %b = select %c, %a, %y ret %b } define @sdiv_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: sdiv_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: sunpkhi z3.h, z1.b ; CHECK-NEXT: sunpkhi z4.h, z0.b ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sunpklo z0.h, z0.b ; CHECK-NEXT: sunpkhi z5.s, z3.h ; CHECK-NEXT: sunpkhi z6.s, z4.h ; CHECK-NEXT: sunpklo z3.s, z3.h ; CHECK-NEXT: sunpklo z4.s, z4.h ; CHECK-NEXT: sunpkhi z7.s, z0.h ; CHECK-NEXT: sunpklo z0.s, z0.h ; CHECK-NEXT: sdivr z5.s, p0/m, z5.s, z6.s ; CHECK-NEXT: sdivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: sunpklo z4.h, z1.b ; CHECK-NEXT: sunpkhi z6.s, z4.h ; CHECK-NEXT: sunpklo z4.s, z4.h ; CHECK-NEXT: sdivr z6.s, p0/m, z6.s, z7.s ; CHECK-NEXT: uzp1 z3.h, z3.h, z5.h ; CHECK-NEXT: sdiv z0.s, p0/m, z0.s, z4.s ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: uzp1 z0.h, z0.h, z6.h ; CHECK-NEXT: uzp1 z0.b, z0.b, z3.b ; CHECK-NEXT: sel z0.b, p0, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = sdiv %x, %y %b = select %c, %a, %y ret %b } define @udiv_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: udiv_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: udiv z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = udiv %x, %y %b = select %c, %a, %y ret %b } define @udiv_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: udiv_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: udiv z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = udiv %x, %y %b = select %c, %a, %y ret %b } define @udiv_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: udiv_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: uunpkhi z3.s, z1.h ; CHECK-NEXT: uunpkhi z4.s, z0.h ; CHECK-NEXT: uunpklo z0.s, z0.h ; CHECK-NEXT: udivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: uunpklo z4.s, z1.h ; CHECK-NEXT: udiv z0.s, p0/m, z0.s, z4.s ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: uzp1 z0.h, z0.h, z3.h ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = udiv %x, %y %b = select %c, %a, %y ret %b } define @udiv_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: udiv_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: uunpkhi z3.h, z1.b ; CHECK-NEXT: uunpkhi z4.h, z0.b ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: uunpklo z0.h, z0.b ; CHECK-NEXT: uunpkhi z5.s, z3.h ; CHECK-NEXT: uunpkhi z6.s, z4.h ; CHECK-NEXT: uunpklo z3.s, z3.h ; CHECK-NEXT: uunpklo z4.s, z4.h ; CHECK-NEXT: uunpkhi z7.s, z0.h ; CHECK-NEXT: uunpklo z0.s, z0.h ; CHECK-NEXT: udivr z5.s, p0/m, z5.s, z6.s ; CHECK-NEXT: udivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: uunpklo z4.h, z1.b ; CHECK-NEXT: uunpkhi z6.s, z4.h ; CHECK-NEXT: uunpklo z4.s, z4.h ; CHECK-NEXT: udivr z6.s, p0/m, z6.s, z7.s ; CHECK-NEXT: uzp1 z3.h, z3.h, z5.h ; CHECK-NEXT: udiv z0.s, p0/m, z0.s, z4.s ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: uzp1 z0.h, z0.h, z6.h ; CHECK-NEXT: uzp1 z0.b, z0.b, z3.b ; CHECK-NEXT: sel z0.b, p0, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = udiv %x, %y %b = select %c, %a, %y ret %b } define @srem_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: srem_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: movprfx z3, z0 ; CHECK-NEXT: sdiv z3.d, p0/m, z3.d, z1.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: msb z1.d, p0/m, z3.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = srem %x, %y %b = select %c, %a, %y ret %b } define @srem_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: srem_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: movprfx z3, z0 ; CHECK-NEXT: sdiv z3.s, p0/m, z3.s, z1.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: msb z1.s, p0/m, z3.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = srem %x, %y %b = select %c, %a, %y ret %b } define @srem_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: srem_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sunpkhi z3.s, z1.h ; CHECK-NEXT: sunpkhi z4.s, z0.h ; CHECK-NEXT: sunpklo z5.s, z0.h ; CHECK-NEXT: sdivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: sunpklo z4.s, z1.h ; CHECK-NEXT: sdivr z4.s, p0/m, z4.s, z5.s ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: uzp1 z3.h, z4.h, z3.h ; CHECK-NEXT: msb z1.h, p0/m, z3.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = srem %x, %y %b = select %c, %a, %y ret %b } define @srem_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: srem_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: sunpkhi z3.h, z1.b ; CHECK-NEXT: sunpkhi z4.h, z0.b ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: sunpkhi z5.s, z3.h ; CHECK-NEXT: sunpkhi z6.s, z4.h ; CHECK-NEXT: sunpklo z3.s, z3.h ; CHECK-NEXT: sunpklo z4.s, z4.h ; CHECK-NEXT: sdivr z5.s, p0/m, z5.s, z6.s ; CHECK-NEXT: sunpklo z6.h, z0.b ; CHECK-NEXT: sunpkhi z24.s, z6.h ; CHECK-NEXT: sunpklo z6.s, z6.h ; CHECK-NEXT: sdivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: sunpklo z4.h, z1.b ; CHECK-NEXT: sunpkhi z7.s, z4.h ; CHECK-NEXT: sunpklo z4.s, z4.h ; CHECK-NEXT: sdivr z7.s, p0/m, z7.s, z24.s ; CHECK-NEXT: uzp1 z3.h, z3.h, z5.h ; CHECK-NEXT: sdivr z4.s, p0/m, z4.s, z6.s ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: uzp1 z4.h, z4.h, z7.h ; CHECK-NEXT: uzp1 z3.b, z4.b, z3.b ; CHECK-NEXT: msb z1.b, p0/m, z3.b, z0.b ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = srem %x, %y %b = select %c, %a, %y ret %b } define @urem_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: urem_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: movprfx z3, z0 ; CHECK-NEXT: udiv z3.d, p0/m, z3.d, z1.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: msb z1.d, p0/m, z3.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = urem %x, %y %b = select %c, %a, %y ret %b } define @urem_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: urem_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: movprfx z3, z0 ; CHECK-NEXT: udiv z3.s, p0/m, z3.s, z1.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: msb z1.s, p0/m, z3.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = urem %x, %y %b = select %c, %a, %y ret %b } define @urem_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: urem_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: uunpkhi z3.s, z1.h ; CHECK-NEXT: uunpkhi z4.s, z0.h ; CHECK-NEXT: uunpklo z5.s, z0.h ; CHECK-NEXT: udivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: uunpklo z4.s, z1.h ; CHECK-NEXT: udivr z4.s, p0/m, z4.s, z5.s ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: uzp1 z3.h, z4.h, z3.h ; CHECK-NEXT: msb z1.h, p0/m, z3.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = urem %x, %y %b = select %c, %a, %y ret %b } define @urem_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: urem_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: uunpkhi z3.h, z1.b ; CHECK-NEXT: uunpkhi z4.h, z0.b ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: uunpkhi z5.s, z3.h ; CHECK-NEXT: uunpkhi z6.s, z4.h ; CHECK-NEXT: uunpklo z3.s, z3.h ; CHECK-NEXT: uunpklo z4.s, z4.h ; CHECK-NEXT: udivr z5.s, p0/m, z5.s, z6.s ; CHECK-NEXT: uunpklo z6.h, z0.b ; CHECK-NEXT: uunpkhi z24.s, z6.h ; CHECK-NEXT: uunpklo z6.s, z6.h ; CHECK-NEXT: udivr z3.s, p0/m, z3.s, z4.s ; CHECK-NEXT: uunpklo z4.h, z1.b ; CHECK-NEXT: uunpkhi z7.s, z4.h ; CHECK-NEXT: uunpklo z4.s, z4.h ; CHECK-NEXT: udivr z7.s, p0/m, z7.s, z24.s ; CHECK-NEXT: uzp1 z3.h, z3.h, z5.h ; CHECK-NEXT: udivr z4.s, p0/m, z4.s, z6.s ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: uzp1 z4.h, z4.h, z7.h ; CHECK-NEXT: uzp1 z3.b, z4.b, z3.b ; CHECK-NEXT: msb z1.b, p0/m, z3.b, z0.b ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = urem %x, %y %b = select %c, %a, %y ret %b } define @and_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: and_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: and z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = and %x, %y %b = select %c, %a, %y ret %b } define @and_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: and_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: and z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = and %x, %y %b = select %c, %a, %y ret %b } define @and_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: and_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: and z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = and %x, %y %b = select %c, %a, %y ret %b } define @and_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: and_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: and z1.b, p0/m, z1.b, z0.b ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = and %x, %y %b = select %c, %a, %y ret %b } define @or_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: or_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: orr z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = or %x, %y %b = select %c, %a, %y ret %b } define @or_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: or_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: orr z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = or %x, %y %b = select %c, %a, %y ret %b } define @or_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: or_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: orr z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = or %x, %y %b = select %c, %a, %y ret %b } define @or_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: or_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: orr z1.b, p0/m, z1.b, z0.b ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = or %x, %y %b = select %c, %a, %y ret %b } define @xor_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: xor_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z2.d, #0 ; CHECK-NEXT: eor z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = xor %x, %y %b = select %c, %a, %y ret %b } define @xor_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: xor_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: eor z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = xor %x, %y %b = select %c, %a, %y ret %b } define @xor_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: xor_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z2.h, #0 ; CHECK-NEXT: eor z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = xor %x, %y %b = select %c, %a, %y ret %b } define @xor_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: xor_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z2.b, #0 ; CHECK-NEXT: eor z1.b, p0/m, z1.b, z0.b ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = xor %x, %y %b = select %c, %a, %y ret %b } define @shl_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: shl_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p1.d, p0/z, z2.d, #0 ; CHECK-NEXT: lsl z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: sel z0.d, p1, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = shl %x, %y %b = select %c, %a, %y ret %b } define @shl_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: shl_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p1.s, p0/z, z2.s, #0 ; CHECK-NEXT: lsl z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: sel z0.s, p1, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = shl %x, %y %b = select %c, %a, %y ret %b } define @shl_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: shl_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p1.h, p0/z, z2.h, #0 ; CHECK-NEXT: lsl z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: sel z0.h, p1, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = shl %x, %y %b = select %c, %a, %y ret %b } define @shl_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: shl_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p1.b, p0/z, z2.b, #0 ; CHECK-NEXT: lsl z0.b, p0/m, z0.b, z1.b ; CHECK-NEXT: sel z0.b, p1, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = shl %x, %y %b = select %c, %a, %y ret %b } define @ashr_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: ashr_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p1.d, p0/z, z2.d, #0 ; CHECK-NEXT: asr z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: sel z0.d, p1, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = ashr %x, %y %b = select %c, %a, %y ret %b } define @ashr_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: ashr_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p1.s, p0/z, z2.s, #0 ; CHECK-NEXT: asr z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: sel z0.s, p1, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = ashr %x, %y %b = select %c, %a, %y ret %b } define @ashr_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: ashr_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p1.h, p0/z, z2.h, #0 ; CHECK-NEXT: asr z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: sel z0.h, p1, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = ashr %x, %y %b = select %c, %a, %y ret %b } define @ashr_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: ashr_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p1.b, p0/z, z2.b, #0 ; CHECK-NEXT: asr z0.b, p0/m, z0.b, z1.b ; CHECK-NEXT: sel z0.b, p1, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = ashr %x, %y %b = select %c, %a, %y ret %b } define @lshr_nxv2i64_y( %x, %y, %n) { ; CHECK-LABEL: lshr_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p1.d, p0/z, z2.d, #0 ; CHECK-NEXT: lsr z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: sel z0.d, p1, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = lshr %x, %y %b = select %c, %a, %y ret %b } define @lshr_nxv4i32_y( %x, %y, %n) { ; CHECK-LABEL: lshr_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p1.s, p0/z, z2.s, #0 ; CHECK-NEXT: lsr z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: sel z0.s, p1, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = lshr %x, %y %b = select %c, %a, %y ret %b } define @lshr_nxv8i16_y( %x, %y, %n) { ; CHECK-LABEL: lshr_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p1.h, p0/z, z2.h, #0 ; CHECK-NEXT: lsr z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: sel z0.h, p1, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = lshr %x, %y %b = select %c, %a, %y ret %b } define @lshr_nxv16i8_y( %x, %y, %n) { ; CHECK-LABEL: lshr_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p1.b, p0/z, z2.b, #0 ; CHECK-NEXT: lsr z0.b, p0/m, z0.b, z1.b ; CHECK-NEXT: sel z0.b, p1, z0.b, z1.b ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = lshr %x, %y %b = select %c, %a, %y ret %b } define @mla_nxv2i64_y( %x, %y, %z, %n) { ; CHECK-LABEL: mla_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z3.d, #0 ; CHECK-NEXT: mad z1.d, p0/m, z2.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %y, %z %a = add %x, %m %b = select %c, %a, %y ret %b } define @mla_nxv4i32_y( %x, %y, %z, %n) { ; CHECK-LABEL: mla_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z3.s, #0 ; CHECK-NEXT: mad z1.s, p0/m, z2.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %y, %z %a = add %x, %m %b = select %c, %a, %y ret %b } define @mla_nxv8i16_y( %x, %y, %z, %n) { ; CHECK-LABEL: mla_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z3.h, #0 ; CHECK-NEXT: mad z1.h, p0/m, z2.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %y, %z %a = add %x, %m %b = select %c, %a, %y ret %b } define @mla_nxv16i8_y( %x, %y, %z, %n) { ; CHECK-LABEL: mla_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z3.b, #0 ; CHECK-NEXT: mad z1.b, p0/m, z2.b, z0.b ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %y, %z %a = add %x, %m %b = select %c, %a, %y ret %b } define @mls_nxv2i64_y( %x, %y, %z, %n) { ; CHECK-LABEL: mls_nxv2i64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: cmpgt p0.d, p0/z, z3.d, #0 ; CHECK-NEXT: msb z1.d, p0/m, z0.d, z2.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %x, %y %a = sub %z, %m %b = select %c, %a, %y ret %b } define @mls_nxv4i32_y( %x, %y, %z, %n) { ; CHECK-LABEL: mls_nxv4i32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpgt p0.s, p0/z, z3.s, #0 ; CHECK-NEXT: msb z1.s, p0/m, z0.s, z2.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %x, %y %a = sub %z, %m %b = select %c, %a, %y ret %b } define @mls_nxv8i16_y( %x, %y, %z, %n) { ; CHECK-LABEL: mls_nxv8i16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: cmpgt p0.h, p0/z, z3.h, #0 ; CHECK-NEXT: msb z1.h, p0/m, z0.h, z2.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %x, %y %a = sub %z, %m %b = select %c, %a, %y ret %b } define @mls_nxv16i8_y( %x, %y, %z, %n) { ; CHECK-LABEL: mls_nxv16i8_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.b ; CHECK-NEXT: cmpgt p0.b, p0/z, z3.b, #0 ; CHECK-NEXT: msb z1.b, p0/m, z0.b, z2.b ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %m = mul %x, %y %a = sub %z, %m %b = select %c, %a, %y ret %b } define @fadd_nxv4f32_y( %x, %y, %n) { ; CHECK-LABEL: fadd_nxv4f32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fadd z0.s, z0.s, z1.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fadd %x, %y %b = select %c, %a, %y ret %b } define @fadd_nxv8f16_y( %x, %y, %n) { ; CHECK-LABEL: fadd_nxv8f16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fadd z0.h, z0.h, z1.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fadd %x, %y %b = select %c, %a, %y ret %b } define @fadd_nxv2f64_y( %x, %y, %n) { ; CHECK-LABEL: fadd_nxv2f64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fadd z0.d, z0.d, z1.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fadd %x, %y %b = select %c, %a, %y ret %b } define @fsub_nxv4f32_y( %x, %y, %n) { ; CHECK-LABEL: fsub_nxv4f32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fsub z0.s, z0.s, z1.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fsub %x, %y %b = select %c, %a, %y ret %b } define @fsub_nxv8f16_y( %x, %y, %n) { ; CHECK-LABEL: fsub_nxv8f16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fsub z0.h, z0.h, z1.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fsub %x, %y %b = select %c, %a, %y ret %b } define @fsub_nxv2f64_y( %x, %y, %n) { ; CHECK-LABEL: fsub_nxv2f64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fsub z0.d, z0.d, z1.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fsub %x, %y %b = select %c, %a, %y ret %b } define @fmul_nxv4f32_y( %x, %y, %n) { ; CHECK-LABEL: fmul_nxv4f32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fmul z0.s, z0.s, z1.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fmul %x, %y %b = select %c, %a, %y ret %b } define @fmul_nxv8f16_y( %x, %y, %n) { ; CHECK-LABEL: fmul_nxv8f16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fmul z0.h, z0.h, z1.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fmul %x, %y %b = select %c, %a, %y ret %b } define @fmul_nxv2f64_y( %x, %y, %n) { ; CHECK-LABEL: fmul_nxv2f64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fmul z0.d, z0.d, z1.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fmul %x, %y %b = select %c, %a, %y ret %b } define @fdiv_nxv4f32_y( %x, %y, %n) { ; CHECK-LABEL: fdiv_nxv4f32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fdiv z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fdiv %x, %y %b = select %c, %a, %y ret %b } define @fdiv_nxv8f16_y( %x, %y, %n) { ; CHECK-LABEL: fdiv_nxv8f16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: fdiv z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fdiv %x, %y %b = select %c, %a, %y ret %b } define @fdiv_nxv2f64_y( %x, %y, %n) { ; CHECK-LABEL: fdiv_nxv2f64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fdiv z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = fdiv %x, %y %b = select %c, %a, %y ret %b } define @minnum_nxv4f32_y( %x, %y, %n) { ; CHECK-LABEL: minnum_nxv4f32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fminnm z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minnum.nxv4f32( %x, %y) %b = select %c, %a, %y ret %b } define @minnum_nxv8f16_y( %x, %y, %n) { ; CHECK-LABEL: minnum_nxv8f16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fminnm z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minnum.nxv8f16( %x, %y) %b = select %c, %a, %y ret %b } define @minnum_nxv2f64_y( %x, %y, %n) { ; CHECK-LABEL: minnum_nxv2f64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fminnm z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minnum.nxv2f64( %x, %y) %b = select %c, %a, %y ret %b } define @maxnum_nxv4f32_y( %x, %y, %n) { ; CHECK-LABEL: maxnum_nxv4f32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmaxnm z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maxnum.nxv4f32( %x, %y) %b = select %c, %a, %y ret %b } define @maxnum_nxv8f16_y( %x, %y, %n) { ; CHECK-LABEL: maxnum_nxv8f16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmaxnm z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maxnum.nxv8f16( %x, %y) %b = select %c, %a, %y ret %b } define @maxnum_nxv2f64_y( %x, %y, %n) { ; CHECK-LABEL: maxnum_nxv2f64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmaxnm z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maxnum.nxv2f64( %x, %y) %b = select %c, %a, %y ret %b } define @minimum_nxv4f32_y( %x, %y, %n) { ; CHECK-LABEL: minimum_nxv4f32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmin z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minimum.nxv4f32( %x, %y) %b = select %c, %a, %y ret %b } define @minimum_nxv8f16_y( %x, %y, %n) { ; CHECK-LABEL: minimum_nxv8f16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmin z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minimum.nxv8f16( %x, %y) %b = select %c, %a, %y ret %b } define @minimum_nxv2f64_y( %x, %y, %n) { ; CHECK-LABEL: minimum_nxv2f64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmin z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.minimum.nxv2f64( %x, %y) %b = select %c, %a, %y ret %b } define @maximum_nxv4f32_y( %x, %y, %n) { ; CHECK-LABEL: maximum_nxv4f32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z2.s, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmax z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maximum.nxv4f32( %x, %y) %b = select %c, %a, %y ret %b } define @maximum_nxv8f16_y( %x, %y, %n) { ; CHECK-LABEL: maximum_nxv8f16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z2.h, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmax z1.h, p0/m, z1.h, z0.h ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maximum.nxv8f16( %x, %y) %b = select %c, %a, %y ret %b } define @maximum_nxv2f64_y( %x, %y, %n) { ; CHECK-LABEL: maximum_nxv2f64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z2.d, #0.0 ; CHECK-NEXT: not p0.b, p0/z, p1.b ; CHECK-NEXT: fmax z1.d, p0/m, z1.d, z0.d ; CHECK-NEXT: mov z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.maximum.nxv2f64( %x, %y) %b = select %c, %a, %y ret %b } define @fmai_nxv4f32_y( %x, %y, %z, %n) { ; CHECK-LABEL: fmai_nxv4f32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z3.s, #0.0 ; CHECK-NEXT: fmla z0.s, p0/m, z1.s, z2.s ; CHECK-NEXT: not p1.b, p0/z, p1.b ; CHECK-NEXT: sel z0.s, p1, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.fma.nxv4f32( %y, %z, %x) %b = select %c, %a, %y ret %b } define @fmai_nxv8f16_y( %x, %y, %z, %n) { ; CHECK-LABEL: fmai_nxv8f16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z3.h, #0.0 ; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h ; CHECK-NEXT: not p1.b, p0/z, p1.b ; CHECK-NEXT: sel z0.h, p1, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.fma.nxv8f16( %y, %z, %x) %b = select %c, %a, %y ret %b } define @fmai_nxv2f64_y( %x, %y, %z, %n) { ; CHECK-LABEL: fmai_nxv2f64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z3.d, #0.0 ; CHECK-NEXT: fmla z0.d, p0/m, z1.d, z2.d ; CHECK-NEXT: not p1.b, p0/z, p1.b ; CHECK-NEXT: sel z0.d, p1, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %a = call @llvm.fma.nxv2f64( %y, %z, %x) %b = select %c, %a, %y ret %b } define @fma_nxv4f32_y( %x, %y, %z, %n) { ; CHECK-LABEL: fma_nxv4f32_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmle p1.s, p0/z, z3.s, #0.0 ; CHECK-NEXT: fmla z0.s, p0/m, z1.s, z2.s ; CHECK-NEXT: not p1.b, p0/z, p1.b ; CHECK-NEXT: sel z0.s, p1, z0.s, z1.s ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %m = fmul fast %y, %z %a = fadd fast %m, %x %b = select %c, %a, %y ret %b } define @fma_nxv8f16_y( %x, %y, %z, %n) { ; CHECK-LABEL: fma_nxv8f16_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: fcmle p1.h, p0/z, z3.h, #0.0 ; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h ; CHECK-NEXT: not p1.b, p0/z, p1.b ; CHECK-NEXT: sel z0.h, p1, z0.h, z1.h ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %m = fmul fast %y, %z %a = fadd fast %m, %x %b = select %c, %a, %y ret %b } define @fma_nxv2f64_y( %x, %y, %z, %n) { ; CHECK-LABEL: fma_nxv2f64_y: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: fcmle p1.d, p0/z, z3.d, #0.0 ; CHECK-NEXT: fmla z0.d, p0/m, z1.d, z2.d ; CHECK-NEXT: not p1.b, p0/z, p1.b ; CHECK-NEXT: sel z0.d, p1, z0.d, z1.d ; CHECK-NEXT: ret entry: %c = fcmp ugt %n, zeroinitializer %m = fmul fast %y, %z %a = fadd fast %m, %x %b = select %c, %a, %y ret %b } define @mul_use_nxv4i32_x( %x, %y, %n, ptr %p) { ; CHECK-LABEL: mul_use_nxv4i32_x: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: mul z1.s, z0.s, z1.s ; CHECK-NEXT: cmpgt p1.s, p0/z, z2.s, #0 ; CHECK-NEXT: st1w { z1.s }, p0, [x0] ; CHECK-NEXT: mov z0.s, p1/m, z1.s ; CHECK-NEXT: ret entry: %c = icmp sgt %n, zeroinitializer %a = mul %x, %y store %a, ptr %p %b = select %c, %a, %x ret %b } declare @llvm.fma.nxv2f64(, , ) declare @llvm.fma.nxv4f32(, , ) declare @llvm.fma.nxv8f16(, , ) declare @llvm.minnum.nxv2f64(, ) declare @llvm.minnum.nxv4f32(, ) declare @llvm.minnum.nxv8f16(, ) declare @llvm.maxnum.nxv2f64(, ) declare @llvm.maxnum.nxv4f32(, ) declare @llvm.maxnum.nxv8f16(, ) declare @llvm.minimum.nxv2f64(, ) declare @llvm.minimum.nxv4f32(, ) declare @llvm.minimum.nxv8f16(, ) declare @llvm.maximum.nxv2f64(, ) declare @llvm.maximum.nxv4f32(, ) declare @llvm.maximum.nxv8f16(, )