; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -verify-machineinstrs < %s | FileCheck %s define @select_nxv1i8(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv1i8: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.b, xzr, x8 ; CHECK-NEXT: sel z0.b, p0, z0.b, z1.b ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv16i8(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv16i8: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.b, xzr, x8 ; CHECK-NEXT: sel z0.b, p0, z0.b, z1.b ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv1i16(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv1i16: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.h, xzr, x8 ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv8i16(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv8i16: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.h, xzr, x8 ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv1i32(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv1i32: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.s, xzr, x8 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv4i32(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv4i32: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.s, xzr, x8 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv1i64(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv1i64: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.d, xzr, x8 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv2i64(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv2i64: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.d, xzr, x8 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv8f16(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv8f16: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.h, xzr, x8 ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv4f32(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv4f32: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.s, xzr, x8 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv2f64(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv2f64: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p0.d, xzr, x8 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv16i1(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv16i1: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p2.b, xzr, x8 ; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv8i1(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv8i1: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p2.h, xzr, x8 ; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv4i1(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv4i1: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p2.s, xzr, x8 ; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv2i1(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv2i1: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p2.d, xzr, x8 ; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } define @select_nxv1i1(i1 %cond, %a, %b) { ; CHECK-LABEL: select_nxv1i1: ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 ; CHECK-NEXT: sbfx x8, x0, #0, #1 ; CHECK-NEXT: whilelo p2.d, xzr, x8 ; CHECK-NEXT: punpklo p2.h, p2.b ; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b ; CHECK-NEXT: ret %res = select i1 %cond, %a, %b ret %res } ; Integer vector select define @sel_nxv16i8( %p, %dst, %a) { ; CHECK-LABEL: sel_nxv16i8: ; CHECK: // %bb.0: ; CHECK-NEXT: mov z0.b, p0/m, z1.b ; CHECK-NEXT: ret %sel = select %p, %a, %dst ret %sel } define @sel_nxv8i16( %p, %dst, %a) { ; CHECK-LABEL: sel_nxv8i16: ; CHECK: // %bb.0: ; CHECK-NEXT: mov z0.h, p0/m, z1.h ; CHECK-NEXT: ret %sel = select %p, %a, %dst ret %sel } define @sel_nxv4i32( %p, %dst, %a) { ; CHECK-LABEL: sel_nxv4i32: ; CHECK: // %bb.0: ; CHECK-NEXT: mov z0.s, p0/m, z1.s ; CHECK-NEXT: ret %sel = select %p, %a, %dst ret %sel } define @sel_nxv1i64( %p, %dst, %a) { ; CHECK-LABEL: sel_nxv1i64: ; CHECK: // %bb.0: ; CHECK-NEXT: uzp1 p0.d, p0.d, p0.d ; CHECK-NEXT: mov z0.d, p0/m, z1.d ; CHECK-NEXT: ret %sel = select %p, %a, %dst ret %sel } define @sel_nxv2i64( %p, %dst, %a) { ; CHECK-LABEL: sel_nxv2i64: ; CHECK: // %bb.0: ; CHECK-NEXT: mov z0.d, p0/m, z1.d ; CHECK-NEXT: ret %sel = select %p, %a, %dst ret %sel } ; Floating point vector select define @sel_nxv8f16( %p, %dst, %a) { ; CHECK-LABEL: sel_nxv8f16: ; CHECK: // %bb.0: ; CHECK-NEXT: mov z0.h, p0/m, z1.h ; CHECK-NEXT: ret %sel = select %p, %a, %dst ret %sel } define @sel_nxv4f32( %p, %dst, %a) { ; CHECK-LABEL: sel_nxv4f32: ; CHECK: // %bb.0: ; CHECK-NEXT: mov z0.s, p0/m, z1.s ; CHECK-NEXT: ret %sel = select %p, %a, %dst ret %sel } define @sel_nxv2f32( %p, %dst, %a) { ; CHECK-LABEL: sel_nxv2f32: ; CHECK: // %bb.0: ; CHECK-NEXT: mov z0.d, p0/m, z1.d ; CHECK-NEXT: ret %sel = select %p, %a, %dst ret %sel } define @sel_nxv8f64( %p, %dst, %a) { ; CHECK-LABEL: sel_nxv8f64: ; CHECK: // %bb.0: ; CHECK-NEXT: mov z0.d, p0/m, z1.d ; CHECK-NEXT: ret %sel = select %p, %a, %dst ret %sel } ; Check icmp+select define @icmp_select_nxv2f16( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv2f16: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.d, xzr, x8 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv2f32( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv2f32: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.d, xzr, x8 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv2f64( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv2f64: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.d, xzr, x8 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv4f16( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv4f16: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.s, xzr, x8 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv4f32( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv4f32: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.s, xzr, x8 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv8f16( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv8f16: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.h, xzr, x8 ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv1i64( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv1i64: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.d, xzr, x8 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv2i64( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv2i64: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.d, xzr, x8 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv1i32( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv1i32: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.s, xzr, x8 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv4i32( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv4i32: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.s, xzr, x8 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv1i16( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv1i16: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.h, xzr, x8 ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv8i16( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv8i16: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.h, xzr, x8 ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv1i8( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv1i8: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.b, xzr, x8 ; CHECK-NEXT: sel z0.b, p0, z0.b, z1.b ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv16i8( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv16i8: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p0.b, xzr, x8 ; CHECK-NEXT: sel z0.b, p0, z0.b, z1.b ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv1i1( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv1i1: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p2.d, xzr, x8 ; CHECK-NEXT: punpklo p2.h, p2.b ; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv2i1( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv2i1: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p2.d, xzr, x8 ; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv4i1( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv4i1: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p2.s, xzr, x8 ; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv8i1( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv8i1: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p2.h, xzr, x8 ; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @icmp_select_nxv16i1( %a, %b, i64 %x0) { ; CHECK-LABEL: icmp_select_nxv16i1: ; CHECK: // %bb.0: ; CHECK-NEXT: cmp x0, #0 ; CHECK-NEXT: cset w8, eq ; CHECK-NEXT: sbfx x8, x8, #0, #1 ; CHECK-NEXT: whilelo p2.b, xzr, x8 ; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b ; CHECK-NEXT: ret %mask = icmp eq i64 %x0, 0 %sel = select i1 %mask, %a, %b ret %sel } define @select_f32_invert_fmul( %a, %b) #0 { ; CHECK-LABEL: select_f32_invert_fmul: ; CHECK: // %bb.0: ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmne p0.s, p0/z, z0.s, #0.0 ; CHECK-NEXT: fmul z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret %p = fcmp oeq %a, zeroinitializer %fmul = fmul %a, %b %sel = select %p, %a, %fmul ret %sel } define @select_f32_invert_fadd( %a, %b) { ; CHECK-LABEL: select_f32_invert_fadd: ; CHECK: // %bb.0: ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmne p0.s, p0/z, z0.s, #0.0 ; CHECK-NEXT: fadd z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret %p = fcmp oeq %a, zeroinitializer %fadd = fadd %a, %b %sel = select %p, %a, %fadd ret %sel } define @select_f32_invert_fsub( %a, %b, %c) { ; CHECK-LABEL: select_f32_invert_fsub: ; CHECK: // %bb.0: ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: cmpne p0.s, p0/z, z2.s, #0 ; CHECK-NEXT: fsub z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret %p = icmp eq %c, zeroinitializer %fsub = fsub %a, %b %sel = select %p, %a, %fsub ret %sel } define @select_f32_no_invert_op_lhs( %a, %b) { ; CHECK-LABEL: select_f32_no_invert_op_lhs: ; CHECK: // %bb.0: ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, #0.0 ; CHECK-NEXT: fmul z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: ret %p = fcmp oeq %a, zeroinitializer %fmul = fmul %a, %b %sel = select %p, %fmul, %a ret %sel } define @select_f32_no_invert_2_op( %a, %b, %c, %d) { ; CHECK-LABEL: select_f32_no_invert_2_op: ; CHECK: // %bb.0: ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fmul z1.s, z0.s, z1.s ; CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, #0.0 ; CHECK-NEXT: fmul z0.s, z2.s, z3.s ; CHECK-NEXT: mov z0.s, p0/m, z1.s ; CHECK-NEXT: ret %p = fcmp oeq %a, zeroinitializer %fmul1 = fmul %a, %b %fmul2 = fmul %c, %d %sel = select %p, %fmul1, %fmul2 ret %sel } define @select_f32_no_invert_equal_ops( %a, %b) { ; CHECK-LABEL: select_f32_no_invert_equal_ops: ; CHECK: // %bb.0: ; CHECK-NEXT: fmul z0.s, z0.s, z1.s ; CHECK-NEXT: ret %m = fmul %a, %b %p = fcmp oeq %m, zeroinitializer %sel = select %p, %m, %m ret %sel } define @select_f32_no_invert_fmul_two_setcc_uses( %a, %b, %c, i32 %len) #0 { ; CHECK-LABEL: select_f32_no_invert_fmul_two_setcc_uses: ; CHECK: // %bb.0: ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: fadd z1.s, z0.s, z1.s ; CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, #0.0 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s ; CHECK-NEXT: mov z0.s, p0/m, z2.s ; CHECK-NEXT: ret %p = fcmp oeq %a, zeroinitializer %fadd = fadd %a, %b %sel = select %p, %a, %fadd %sel2 = select %p, %c, %sel ret %sel2 } define <4 x float> @select_f32_no_invert_not_scalable(<4 x float> %a, <4 x float> %b) #0 { ; CHECK-LABEL: select_f32_no_invert_not_scalable: ; CHECK: // %bb.0: ; CHECK-NEXT: fcmeq v2.4s, v0.4s, #0.0 ; CHECK-NEXT: fmul v1.4s, v0.4s, v1.4s ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b ; CHECK-NEXT: ret %p = fcmp oeq <4 x float> %a, zeroinitializer %fmul = fmul <4 x float> %a, %b %sel = select <4 x i1> %p, <4 x float> %a, <4 x float> %fmul ret <4 x float> %sel }