; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s --check-prefixes=CHECK ; LEGAL INTEGER TYPES define @stepvector_nxv2i64() { ; CHECK-LABEL: stepvector_nxv2i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.d, #0, #1 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv2i64() ret %0 } define @stepvector_nxv4i32() { ; CHECK-LABEL: stepvector_nxv4i32: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.s, #0, #1 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv4i32() ret %0 } define @stepvector_nxv8i16() { ; CHECK-LABEL: stepvector_nxv8i16: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, #0, #1 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv8i16() ret %0 } define @stepvector_nxv16i8() { ; CHECK-LABEL: stepvector_nxv16i8: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.b, #0, #1 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv16i8() ret %0 } ; ILLEGAL INTEGER TYPES define @stepvector_nxv6i64() { ; CHECK-LABEL: stepvector_nxv6i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.d, #0, #1 ; CHECK-NEXT: mov z2.d, z0.d ; CHECK-NEXT: mov z1.d, z0.d ; CHECK-NEXT: incd z1.d ; CHECK-NEXT: incd z2.d, all, mul #2 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv6i64() ret %0 } define @stepvector_nxv4i64() { ; CHECK-LABEL: stepvector_nxv4i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.d, #0, #1 ; CHECK-NEXT: mov z1.d, z0.d ; CHECK-NEXT: incd z1.d ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv4i64() ret %0 } define @stepvector_nxv16i32() { ; CHECK-LABEL: stepvector_nxv16i32: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.s, #0, #1 ; CHECK-NEXT: mov z1.d, z0.d ; CHECK-NEXT: mov z2.d, z0.d ; CHECK-NEXT: incw z1.s ; CHECK-NEXT: incw z2.s, all, mul #2 ; CHECK-NEXT: mov z3.d, z1.d ; CHECK-NEXT: incw z3.s, all, mul #2 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv16i32() ret %0 } define @stepvector_nxv3i32() { ; CHECK-LABEL: stepvector_nxv3i32: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.s, #0, #1 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv3i32() ret %0 } define @stepvector_nxv2i32() { ; CHECK-LABEL: stepvector_nxv2i32: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.d, #0, #1 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv2i32() ret %0 } define @stepvector_nxv4i16() { ; CHECK-LABEL: stepvector_nxv4i16: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.s, #0, #1 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv4i16() ret %0 } define @stepvector_nxv8i8() { ; CHECK-LABEL: stepvector_nxv8i8: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, #0, #1 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv8i8() ret %0 } define @add_stepvector_nxv8i8() { ; CHECK-LABEL: add_stepvector_nxv8i8: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, #0, #2 ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv8i8() %1 = call @llvm.experimental.stepvector.nxv8i8() %2 = add %0, %1 ret %2 } define @add_stepvector_nxv8i8_1( %p) { ; CHECK-LABEL: add_stepvector_nxv8i8_1: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z1.h, #0, #2 ; CHECK-NEXT: add z0.h, z0.h, z1.h ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv8i8() %1 = add %p, %0 %2 = call @llvm.experimental.stepvector.nxv8i8() %3 = add %1, %2 ret %3 } define @add_stepvector_nxv8i8_2() { ; CHECK-LABEL: add_stepvector_nxv8i8_2: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, #2, #1 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i8 2, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv8i8() %3 = add %2, %1 ret %3 } define @add_stepvector_nxv8i8_2_commutative() { ; CHECK-LABEL: add_stepvector_nxv8i8_2_commutative: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, #2, #1 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i8 2, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv8i8() %3 = add %1, %2 ret %3 } define @add_stepvector_nxv8i16_1(i16 %data) { ; CHECK-LABEL: add_stepvector_nxv8i16_1: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, w0, #1 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i16 %data, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv8i16() %3 = add %2, %1 ret %3 } define @add_stepvector_nxv4i32_1(i32 %data) { ; CHECK-LABEL: add_stepvector_nxv4i32_1: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.s, w0, #1 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i32 %data, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv4i32() %3 = add %2, %1 ret %3 } define @multiple_use_stepvector_nxv4i32_1(i32 %data) { ; CHECK-LABEL: multiple_use_stepvector_nxv4i32_1: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: index z0.s, w0, #1 ; CHECK-NEXT: mov z1.s, w0 ; CHECK-NEXT: mul z1.s, p0/m, z1.s, z0.s ; CHECK-NEXT: sub z0.s, z1.s, z0.s ; CHECK-NEXT: ret entry: %0 = insertelement poison, i32 %data, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv4i32() %3 = add %2, %1 %4 = mul %1, %3 %5 = sub %4, %3 ret %5 } define @add_stepvector_nxv2i64_1(i64 %data) { ; CHECK-LABEL: add_stepvector_nxv2i64_1: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.d, x0, #1 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i64 %data, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv2i64() %3 = add %1, %2 ret %3 } define @multiple_use_stepvector_nxv2i64_1(i64 %data) { ; CHECK-LABEL: multiple_use_stepvector_nxv2i64_1: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.d, #0, #1 ; CHECK-NEXT: mov z1.d, x0 ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: add z1.d, z0.d, z1.d ; CHECK-NEXT: mul z0.d, p0/m, z0.d, z1.d ; CHECK-NEXT: ret entry: %0 = insertelement poison, i64 %data, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv2i64() %3 = add %1, %2 %4 = mul %3, %2 ret %4 } define @mul_stepvector_nxv8i8() { ; CHECK-LABEL: mul_stepvector_nxv8i8: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, #0, #2 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i8 2, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv8i8() %3 = mul %2, %1 ret %3 } define @mul_stepvector_nxv2i64() { ; CHECK-LABEL: mul_stepvector_nxv2i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: mov w8, #2222 // =0x8ae ; CHECK-NEXT: index z0.d, #0, x8 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i64 2222, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv2i64() %3 = mul %2, %1 ret %3 } define @mul_stepvector_bigconst_nxv2i64() { ; CHECK-LABEL: mul_stepvector_bigconst_nxv2i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: mov x8, #146028888064 // =0x2200000000 ; CHECK-NEXT: index z0.d, #0, x8 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i64 146028888064, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv2i64() %3 = mul %2, %1 ret %3 } define @mul_add_stepvector_nxv2i64(i64 %x) { ; CHECK-LABEL: mul_add_stepvector_nxv2i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: mov w8, #2222 // =0x8ae ; CHECK-NEXT: index z0.d, x0, x8 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i64 2222, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv2i64() %3 = mul %2, %1 %4 = insertelement poison, i64 %x, i32 0 %5 = shufflevector %4, poison, zeroinitializer %6 = add %3, %5 ret %6 } define @mul_add_stepvector_nxv2i64_commutative(i64 %x, i64 %y) { ; CHECK-LABEL: mul_add_stepvector_nxv2i64_commutative: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.d, x0, x1 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i64 %y, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv2i64() %3 = mul %1, %2 %4 = insertelement poison, i64 %x, i32 0 %5 = shufflevector %4, poison, zeroinitializer %6 = add %5, %3 ret %6 } define @mul_add_stepvector_bigconst_nxv2i64(i64 %x) { ; CHECK-LABEL: mul_add_stepvector_bigconst_nxv2i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: mov x8, #146028888064 // =0x2200000000 ; CHECK-NEXT: index z0.d, x0, x8 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i64 146028888064, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv2i64() %3 = mul %2, %1 %4 = insertelement poison, i64 %x, i32 0 %5 = shufflevector %4, poison, zeroinitializer %6 = add %3, %5 ret %6 } define @mul_mul_add_stepvector_nxv2i64(i64 %x, i64 %y) { ; CHECK-LABEL: mul_mul_add_stepvector_nxv2i64: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: add x8, x0, x0, lsl #1 ; CHECK-NEXT: index z0.d, x1, x8 ; CHECK-NEXT: ret entry: %xmul = mul i64 %x, 3 %0 = insertelement poison, i64 %xmul, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv2i64() %3 = mul %2, %1 %4 = insertelement poison, i64 %y, i32 0 %5 = shufflevector %4, poison, zeroinitializer %6 = add %3, %5 ret %6 } define @shl_stepvector_nxv8i8() { ; CHECK-LABEL: shl_stepvector_nxv8i8: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, #0, #4 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i8 2, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv8i8() %3 = shl %2, %1 ret %3 } define @sub_multiple_use_stepvector_nxv8i16() { ; CHECK-LABEL: sub_multiple_use_stepvector_nxv8i16: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, #0, #1 ; CHECK-NEXT: ptrue p0.h ; CHECK-NEXT: mov z1.d, z0.d ; CHECK-NEXT: subr z1.h, z1.h, #2 // =0x2 ; CHECK-NEXT: lsl z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: ret entry: %0 = insertelement poison, i16 2, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv8i16() %3 = sub %1, %2 %4 = shl %2, %3 ret %4 } define @sub_stepvector_nxv8i16() { ; CHECK-LABEL: sub_stepvector_nxv8i16: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, #2, #-1 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i16 2, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv8i16() %3 = sub %1, %2 ret %3 } define @promote_sub_stepvector_nxv8i8() { ; CHECK-LABEL: promote_sub_stepvector_nxv8i8: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: index z0.h, #2, #-1 ; CHECK-NEXT: ret entry: %0 = insertelement poison, i8 2, i32 0 %1 = shufflevector %0, poison, zeroinitializer %2 = call @llvm.experimental.stepvector.nxv8i8() %3 = sub %1, %2 ret %3 } define @split_sub_stepvector_nxv16i32() { ; CHECK-LABEL: split_sub_stepvector_nxv16i32: ; CHECK: // %bb.0: // %entry ; CHECK-NEXT: cntw x8 ; CHECK-NEXT: index z0.s, #0, #-1 ; CHECK-NEXT: neg x8, x8 ; CHECK-NEXT: mov z1.s, w8 ; CHECK-NEXT: cnth x8 ; CHECK-NEXT: neg x8, x8 ; CHECK-NEXT: mov z3.s, w8 ; CHECK-NEXT: add z1.s, z0.s, z1.s ; CHECK-NEXT: add z2.s, z0.s, z3.s ; CHECK-NEXT: add z3.s, z1.s, z3.s ; CHECK-NEXT: ret entry: %0 = call @llvm.experimental.stepvector.nxv16i32() %1 = sub zeroinitializer, %0 ret %1 } declare @llvm.experimental.stepvector.nxv2i64() declare @llvm.experimental.stepvector.nxv4i32() declare @llvm.experimental.stepvector.nxv8i16() declare @llvm.experimental.stepvector.nxv16i8() declare @llvm.experimental.stepvector.nxv6i64() declare @llvm.experimental.stepvector.nxv4i64() declare @llvm.experimental.stepvector.nxv16i32() declare @llvm.experimental.stepvector.nxv3i32() declare @llvm.experimental.stepvector.nxv2i32() declare @llvm.experimental.stepvector.nxv8i8() declare @llvm.experimental.stepvector.nxv4i16()