; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+sve | FileCheck %s define @interleave2_nxv4f16( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv4f16: ; CHECK: // %bb.0: ; CHECK-NEXT: zip2 z2.d, z0.d, z1.d ; CHECK-NEXT: zip1 z0.d, z0.d, z1.d ; CHECK-NEXT: uzp1 z0.s, z0.s, z2.s ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv4f16( %vec0, %vec1) ret %retval } define @interleave2_nxv8f16( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv8f16: ; CHECK: // %bb.0: ; CHECK-NEXT: zip2 z2.s, z0.s, z1.s ; CHECK-NEXT: zip1 z0.s, z0.s, z1.s ; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv8f16( %vec0, %vec1) ret %retval } define @interleave2_nxv16f16( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv16f16: ; CHECK: // %bb.0: ; CHECK-NEXT: zip1 z2.h, z0.h, z1.h ; CHECK-NEXT: zip2 z1.h, z0.h, z1.h ; CHECK-NEXT: mov z0.d, z2.d ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv16f16( %vec0, %vec1) ret %retval } define @interleave2_nxv4f32( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv4f32: ; CHECK: // %bb.0: ; CHECK-NEXT: zip2 z2.d, z0.d, z1.d ; CHECK-NEXT: zip1 z0.d, z0.d, z1.d ; CHECK-NEXT: uzp1 z0.s, z0.s, z2.s ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv4f32( %vec0, %vec1) ret %retval } define @interleave2_nxv8f32( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv8f32: ; CHECK: // %bb.0: ; CHECK-NEXT: zip1 z2.s, z0.s, z1.s ; CHECK-NEXT: zip2 z1.s, z0.s, z1.s ; CHECK-NEXT: mov z0.d, z2.d ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv8f32( %vec0, %vec1) ret %retval } define @interleave2_nxv4f64( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv4f64: ; CHECK: // %bb.0: ; CHECK-NEXT: zip1 z2.d, z0.d, z1.d ; CHECK-NEXT: zip2 z1.d, z0.d, z1.d ; CHECK-NEXT: mov z0.d, z2.d ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv4f64( %vec0, %vec1) ret %retval } ; Integers define @interleave2_nxv32i8( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv32i8: ; CHECK: // %bb.0: ; CHECK-NEXT: zip1 z2.b, z0.b, z1.b ; CHECK-NEXT: zip2 z1.b, z0.b, z1.b ; CHECK-NEXT: mov z0.d, z2.d ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv32i8( %vec0, %vec1) ret %retval } define @interleave2_nxv16i16( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv16i16: ; CHECK: // %bb.0: ; CHECK-NEXT: zip1 z2.h, z0.h, z1.h ; CHECK-NEXT: zip2 z1.h, z0.h, z1.h ; CHECK-NEXT: mov z0.d, z2.d ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv16i16( %vec0, %vec1) ret %retval } define @interleave2_nxv8i32( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv8i32: ; CHECK: // %bb.0: ; CHECK-NEXT: zip1 z2.s, z0.s, z1.s ; CHECK-NEXT: zip2 z1.s, z0.s, z1.s ; CHECK-NEXT: mov z0.d, z2.d ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv8i32( %vec0, %vec1) ret %retval } define @interleave2_nxv4i64( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv4i64: ; CHECK: // %bb.0: ; CHECK-NEXT: zip1 z2.d, z0.d, z1.d ; CHECK-NEXT: zip2 z1.d, z0.d, z1.d ; CHECK-NEXT: mov z0.d, z2.d ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv4i64( %vec0, %vec1) ret %retval } ; Predicated define @interleave2_nxv32i1( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv32i1: ; CHECK: // %bb.0: ; CHECK-NEXT: zip1 p2.b, p0.b, p1.b ; CHECK-NEXT: zip2 p1.b, p0.b, p1.b ; CHECK-NEXT: mov p0.b, p2.b ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv32i1( %vec0, %vec1) ret %retval } define @interleave2_nxv16i1( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv16i1: ; CHECK: // %bb.0: ; CHECK-NEXT: zip2 p2.h, p0.h, p1.h ; CHECK-NEXT: zip1 p0.h, p0.h, p1.h ; CHECK-NEXT: uzp1 p0.b, p0.b, p2.b ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv16i1( %vec0, %vec1) ret %retval } define @interleave2_nxv8i1( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv8i1: ; CHECK: // %bb.0: ; CHECK-NEXT: zip2 p2.s, p0.s, p1.s ; CHECK-NEXT: zip1 p0.s, p0.s, p1.s ; CHECK-NEXT: uzp1 p0.h, p0.h, p2.h ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv8i1( %vec0, %vec1) ret %retval } define @interleave2_nxv4i1( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv4i1: ; CHECK: // %bb.0: ; CHECK-NEXT: zip2 p2.d, p0.d, p1.d ; CHECK-NEXT: zip1 p0.d, p0.d, p1.d ; CHECK-NEXT: uzp1 p0.s, p0.s, p2.s ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv4i1( %vec0, %vec1) ret %retval } ; Split illegal type size define @interleave2_nxv16i32( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv16i32: ; CHECK: // %bb.0: ; CHECK-NEXT: zip1 z4.s, z1.s, z3.s ; CHECK-NEXT: zip1 z5.s, z0.s, z2.s ; CHECK-NEXT: zip2 z2.s, z0.s, z2.s ; CHECK-NEXT: zip2 z3.s, z1.s, z3.s ; CHECK-NEXT: mov z0.d, z5.d ; CHECK-NEXT: mov z1.d, z2.d ; CHECK-NEXT: mov z2.d, z4.d ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv16i32( %vec0, %vec1) ret %retval } define @interleave2_nxv8i64( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv8i64: ; CHECK: // %bb.0: ; CHECK-NEXT: zip1 z4.d, z1.d, z3.d ; CHECK-NEXT: zip1 z5.d, z0.d, z2.d ; CHECK-NEXT: zip2 z2.d, z0.d, z2.d ; CHECK-NEXT: zip2 z3.d, z1.d, z3.d ; CHECK-NEXT: mov z0.d, z5.d ; CHECK-NEXT: mov z1.d, z2.d ; CHECK-NEXT: mov z2.d, z4.d ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv8i64( %vec0, %vec1) ret %retval } ; Promote illegal type size define @interleave2_nxv8i8( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv8i8: ; CHECK: // %bb.0: ; CHECK-NEXT: zip2 z2.h, z0.h, z1.h ; CHECK-NEXT: zip1 z0.h, z0.h, z1.h ; CHECK-NEXT: uzp1 z0.b, z0.b, z2.b ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv16i8( %vec0, %vec1) ret %retval } define @interleave2_nxv4i16( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv4i16: ; CHECK: // %bb.0: ; CHECK-NEXT: zip2 z2.s, z0.s, z1.s ; CHECK-NEXT: zip1 z0.s, z0.s, z1.s ; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv8i16( %vec0, %vec1) ret %retval } define @interleave2_nxv2i32( %vec0, %vec1) { ; CHECK-LABEL: interleave2_nxv2i32: ; CHECK: // %bb.0: ; CHECK-NEXT: zip2 z2.d, z0.d, z1.d ; CHECK-NEXT: zip1 z0.d, z0.d, z1.d ; CHECK-NEXT: uzp1 z0.s, z0.s, z2.s ; CHECK-NEXT: ret %retval = call @llvm.experimental.vector.interleave2.nxv4i32( %vec0, %vec1) ret %retval } ; Float declarations declare @llvm.experimental.vector.interleave2.nxv4f16(, ) declare @llvm.experimental.vector.interleave2.nxv8f16(, ) declare @llvm.experimental.vector.interleave2.nxv16f16(, ) declare @llvm.experimental.vector.interleave2.nxv4f32(, ) declare @llvm.experimental.vector.interleave2.nxv8f32(, ) declare @llvm.experimental.vector.interleave2.nxv4f64(, ) ; Integer declarations declare @llvm.experimental.vector.interleave2.nxv32i8(, ) declare @llvm.experimental.vector.interleave2.nxv16i16(, ) declare @llvm.experimental.vector.interleave2.nxv8i32(, ) declare @llvm.experimental.vector.interleave2.nxv4i64(, ) ; Predicated declare @llvm.experimental.vector.interleave2.nxv32i1(, ) declare @llvm.experimental.vector.interleave2.nxv16i1(, ) declare @llvm.experimental.vector.interleave2.nxv8i1(, ) declare @llvm.experimental.vector.interleave2.nxv4i1(, ) ; Illegal type size declare @llvm.experimental.vector.interleave2.nxv16i32(, ) declare @llvm.experimental.vector.interleave2.nxv8i64(, ) declare @llvm.experimental.vector.interleave2.nxv16i8(, ) declare @llvm.experimental.vector.interleave2.nxv8i16(, ) declare @llvm.experimental.vector.interleave2.nxv4i32(, )