; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme < %s | FileCheck %s ; ADDHNB define @addhnb_h( %a, %b) { ; CHECK-LABEL: addhnb_h: ; CHECK: // %bb.0: ; CHECK-NEXT: addhnb z0.b, z0.h, z1.h ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.addhnb.nxv8i16( %a, %b) ret %out } define @addhnb_s( %a, %b) { ; CHECK-LABEL: addhnb_s: ; CHECK: // %bb.0: ; CHECK-NEXT: addhnb z0.h, z0.s, z1.s ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.addhnb.nxv4i32( %a, %b) ret %out } define @addhnb_d( %a, %b) { ; CHECK-LABEL: addhnb_d: ; CHECK: // %bb.0: ; CHECK-NEXT: addhnb z0.s, z0.d, z1.d ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.addhnb.nxv2i64( %a, %b) ret %out } ; ADDHNT define @addhnt_h( %a, %b, %c) { ; CHECK-LABEL: addhnt_h: ; CHECK: // %bb.0: ; CHECK-NEXT: addhnt z0.b, z1.h, z2.h ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.addhnt.nxv8i16( %a, %b, %c) ret %out } define @addhnt_s( %a, %b, %c) { ; CHECK-LABEL: addhnt_s: ; CHECK: // %bb.0: ; CHECK-NEXT: addhnt z0.h, z1.s, z2.s ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.addhnt.nxv4i32( %a, %b, %c) ret %out } define @addhnt_d( %a, %b, %c) { ; CHECK-LABEL: addhnt_d: ; CHECK: // %bb.0: ; CHECK-NEXT: addhnt z0.s, z1.d, z2.d ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.addhnt.nxv2i64( %a, %b, %c) ret %out } ; RADDHNB define @raddhnb_h( %a, %b) { ; CHECK-LABEL: raddhnb_h: ; CHECK: // %bb.0: ; CHECK-NEXT: raddhnb z0.b, z0.h, z1.h ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.raddhnb.nxv8i16( %a, %b) ret %out } define @raddhnb_s( %a, %b) { ; CHECK-LABEL: raddhnb_s: ; CHECK: // %bb.0: ; CHECK-NEXT: raddhnb z0.h, z0.s, z1.s ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.raddhnb.nxv4i32( %a, %b) ret %out } define @raddhnb_d( %a, %b) { ; CHECK-LABEL: raddhnb_d: ; CHECK: // %bb.0: ; CHECK-NEXT: raddhnb z0.s, z0.d, z1.d ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.raddhnb.nxv2i64( %a, %b) ret %out } ; RADDHNT define @raddhnt_h( %a, %b, %c) { ; CHECK-LABEL: raddhnt_h: ; CHECK: // %bb.0: ; CHECK-NEXT: raddhnt z0.b, z1.h, z2.h ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.raddhnt.nxv8i16( %a, %b, %c) ret %out } define @raddhnt_s( %a, %b, %c) { ; CHECK-LABEL: raddhnt_s: ; CHECK: // %bb.0: ; CHECK-NEXT: raddhnt z0.h, z1.s, z2.s ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.raddhnt.nxv4i32( %a, %b, %c) ret %out } define @raddhnt_d( %a, %b, %c) { ; CHECK-LABEL: raddhnt_d: ; CHECK: // %bb.0: ; CHECK-NEXT: raddhnt z0.s, z1.d, z2.d ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.raddhnt.nxv2i64( %a, %b, %c) ret %out } ; RSUBHNB define @rsubhnb_h( %a, %b) { ; CHECK-LABEL: rsubhnb_h: ; CHECK: // %bb.0: ; CHECK-NEXT: rsubhnb z0.b, z0.h, z1.h ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.rsubhnb.nxv8i16( %a, %b) ret %out } define @rsubhnb_s( %a, %b) { ; CHECK-LABEL: rsubhnb_s: ; CHECK: // %bb.0: ; CHECK-NEXT: rsubhnb z0.h, z0.s, z1.s ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.rsubhnb.nxv4i32( %a, %b) ret %out } define @rsubhnb_d( %a, %b) { ; CHECK-LABEL: rsubhnb_d: ; CHECK: // %bb.0: ; CHECK-NEXT: rsubhnb z0.s, z0.d, z1.d ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.rsubhnb.nxv2i64( %a, %b) ret %out } ; RSUBHNT define @rsubhnt_h( %a, %b, %c) { ; CHECK-LABEL: rsubhnt_h: ; CHECK: // %bb.0: ; CHECK-NEXT: rsubhnt z0.b, z1.h, z2.h ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.rsubhnt.nxv8i16( %a, %b, %c) ret %out } define @rsubhnt_s( %a, %b, %c) { ; CHECK-LABEL: rsubhnt_s: ; CHECK: // %bb.0: ; CHECK-NEXT: rsubhnt z0.h, z1.s, z2.s ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.rsubhnt.nxv4i32( %a, %b, %c) ret %out } define @rsubhnt_d( %a, %b, %c) { ; CHECK-LABEL: rsubhnt_d: ; CHECK: // %bb.0: ; CHECK-NEXT: rsubhnt z0.s, z1.d, z2.d ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.rsubhnt.nxv2i64( %a, %b, %c) ret %out } ; SUBHNB define @subhnb_h( %a, %b) { ; CHECK-LABEL: subhnb_h: ; CHECK: // %bb.0: ; CHECK-NEXT: subhnb z0.b, z0.h, z1.h ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.subhnb.nxv8i16( %a, %b) ret %out } define @subhnb_s( %a, %b) { ; CHECK-LABEL: subhnb_s: ; CHECK: // %bb.0: ; CHECK-NEXT: subhnb z0.h, z0.s, z1.s ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.subhnb.nxv4i32( %a, %b) ret %out } define @subhnb_d( %a, %b) { ; CHECK-LABEL: subhnb_d: ; CHECK: // %bb.0: ; CHECK-NEXT: subhnb z0.s, z0.d, z1.d ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.subhnb.nxv2i64( %a, %b) ret %out } ; SUBHNT define @subhnt_h( %a, %b, %c) { ; CHECK-LABEL: subhnt_h: ; CHECK: // %bb.0: ; CHECK-NEXT: subhnt z0.b, z1.h, z2.h ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.subhnt.nxv8i16( %a, %b, %c) ret %out } define @subhnt_s( %a, %b, %c) { ; CHECK-LABEL: subhnt_s: ; CHECK: // %bb.0: ; CHECK-NEXT: subhnt z0.h, z1.s, z2.s ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.subhnt.nxv4i32( %a, %b, %c) ret %out } define @subhnt_d( %a, %b, %c) { ; CHECK-LABEL: subhnt_d: ; CHECK: // %bb.0: ; CHECK-NEXT: subhnt z0.s, z1.d, z2.d ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.subhnt.nxv2i64( %a, %b, %c) ret %out } declare @llvm.aarch64.sve.addhnb.nxv8i16(, ) declare @llvm.aarch64.sve.addhnb.nxv4i32(, ) declare @llvm.aarch64.sve.addhnb.nxv2i64(, ) declare @llvm.aarch64.sve.addhnt.nxv8i16(, , ) declare @llvm.aarch64.sve.addhnt.nxv4i32(, , ) declare @llvm.aarch64.sve.addhnt.nxv2i64(, , ) declare @llvm.aarch64.sve.raddhnb.nxv8i16(, ) declare @llvm.aarch64.sve.raddhnb.nxv4i32(, ) declare @llvm.aarch64.sve.raddhnb.nxv2i64(, ) declare @llvm.aarch64.sve.raddhnt.nxv8i16(, , ) declare @llvm.aarch64.sve.raddhnt.nxv4i32(, , ) declare @llvm.aarch64.sve.raddhnt.nxv2i64(, , ) declare @llvm.aarch64.sve.subhnb.nxv8i16(, ) declare @llvm.aarch64.sve.subhnb.nxv4i32(, ) declare @llvm.aarch64.sve.subhnb.nxv2i64(, ) declare @llvm.aarch64.sve.subhnt.nxv8i16(, , ) declare @llvm.aarch64.sve.subhnt.nxv4i32(, , ) declare @llvm.aarch64.sve.subhnt.nxv2i64(, , ) declare @llvm.aarch64.sve.rsubhnb.nxv8i16(, ) declare @llvm.aarch64.sve.rsubhnb.nxv4i32(, ) declare @llvm.aarch64.sve.rsubhnb.nxv2i64(, ) declare @llvm.aarch64.sve.rsubhnt.nxv8i16(, , ) declare @llvm.aarch64.sve.rsubhnt.nxv4i32(, , ) declare @llvm.aarch64.sve.rsubhnt.nxv2i64(, , )