# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3 # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -run-pass=machine-sink -o - %s | FileCheck %s --- name: multi_else_break tracksRegLiveness: true body: | ; CHECK-LABEL: name: multi_else_break ; CHECK: bb.0: ; CHECK-NEXT: successors: %bb.1(0x80000000) ; CHECK-NEXT: liveins: $vgpr4, $vgpr5 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr5 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr4 ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]], implicit $exec ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF2:%[0-9]+]]:sreg_32 = IMPLICIT_DEF ; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[PHI:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.0, %9, %bb.6 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[COPY2]], %bb.0, %11, %bb.6 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000) ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[PHI2:%[0-9]+]]:sreg_32 = PHI [[DEF1]], %bb.1, %13, %bb.5 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:sreg_32 = PHI [[DEF]], %bb.1, %15, %bb.5 ; CHECK-NEXT: [[PHI4:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.1, %17, %bb.5 ; CHECK-NEXT: [[PHI5:%[0-9]+]]:vgpr_32 = PHI [[PHI1]], %bb.1, %19, %bb.5 ; CHECK-NEXT: [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_LT_I32_e64 [[PHI5]], [[COPY1]], implicit $exec ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[DEF2]] ; CHECK-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[PHI3]], $exec_lo, implicit-def $scc ; CHECK-NEXT: [[S_OR_B32_1:%[0-9]+]]:sreg_32 = S_OR_B32 [[PHI2]], $exec_lo, implicit-def $scc ; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF killed [[V_CMP_LT_I32_e64_]], %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.4 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: SI_END_CF %9, implicit-def dead $exec, implicit-def dead $scc, implicit $exec ; CHECK-NEXT: S_ENDPGM 0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[PHI5]], [[S_MOV_B32_1]], 0, implicit $exec ; CHECK-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 [[COPY]], [[V_ADD_U32_e64_]], implicit $exec ; CHECK-NEXT: [[S_ANDN2_B32_:%[0-9]+]]:sreg_32 = S_ANDN2_B32 [[S_OR_B32_]], $exec_lo, implicit-def $scc ; CHECK-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[S_ANDN2_B32_]] ; CHECK-NEXT: [[S_ANDN2_B32_1:%[0-9]+]]:sreg_32 = S_ANDN2_B32 [[S_OR_B32_1]], $exec_lo, implicit-def $scc ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[V_CMP_NE_U32_e64_]], $exec_lo, implicit-def $scc ; CHECK-NEXT: [[S_OR_B32_2:%[0-9]+]]:sreg_32 = S_OR_B32 [[S_ANDN2_B32_1]], [[S_AND_B32_]], implicit-def $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.6(0x04000000), %bb.2(0x7c000000) ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[PHI6:%[0-9]+]]:sreg_32 = PHI [[S_OR_B32_1]], %bb.2, [[S_OR_B32_2]], %bb.4 ; CHECK-NEXT: [[PHI7:%[0-9]+]]:sreg_32 = PHI [[S_OR_B32_]], %bb.2, [[COPY4]], %bb.4 ; CHECK-NEXT: [[PHI8:%[0-9]+]]:vgpr_32 = PHI [[COPY3]], %bb.2, [[V_ADD_U32_e64_]], %bb.4 ; CHECK-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec ; CHECK-NEXT: [[SI_IF_BREAK:%[0-9]+]]:sreg_32 = SI_IF_BREAK [[PHI6]], [[PHI4]], implicit-def dead $scc ; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.6 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.3(0x04000000), %bb.1(0x7c000000) ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[PHI9:%[0-9]+]]:vgpr_32 = PHI [[PHI8]], %bb.5 ; CHECK-NEXT: SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec ; CHECK-NEXT: [[SI_IF_BREAK1:%[0-9]+]]:sreg_32 = SI_IF_BREAK [[PHI7]], [[PHI]], implicit-def dead $scc ; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK1]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 bb.0: successors: %bb.1(0x80000000) liveins: $vgpr4, $vgpr5 %21:vgpr_32 = COPY $vgpr5 %20:vgpr_32 = COPY $vgpr4 %23:sreg_32 = S_MOV_B32 0 %33:vgpr_32 = COPY %23, implicit $exec %38:sreg_32 = IMPLICIT_DEF %44:sreg_32 = IMPLICIT_DEF %26:sreg_32 = IMPLICIT_DEF %29:sreg_32 = S_MOV_B32 1 bb.1: successors: %bb.2(0x80000000) %0:sreg_32 = PHI %23, %bb.0, %12, %bb.6 %1:vgpr_32 = PHI %33, %bb.0, %13, %bb.6 bb.2: successors: %bb.4(0x40000000), %bb.5(0x40000000) %48:sreg_32 = PHI %44, %bb.1, %10, %bb.5 %42:sreg_32 = PHI %38, %bb.1, %8, %bb.5 %2:sreg_32 = PHI %23, %bb.1, %11, %bb.5 %3:vgpr_32 = PHI %1, %bb.1, %9, %bb.5 %27:sreg_32 = V_CMP_LT_I32_e64 %3, %20, implicit $exec %36:vgpr_32 = COPY %26 %39:sreg_32 = S_OR_B32 %42, $exec_lo, implicit-def $scc %45:sreg_32 = S_OR_B32 %48, $exec_lo, implicit-def $scc %4:sreg_32 = SI_IF killed %27, %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec S_BRANCH %bb.4 bb.3: SI_END_CF %12, implicit-def dead $exec, implicit-def dead $scc, implicit $exec S_ENDPGM 0 bb.4: successors: %bb.5(0x80000000) %6:vgpr_32 = V_ADD_U32_e64 %3, %29, 0, implicit $exec %30:sreg_32 = V_CMP_NE_U32_e64 %21, %6, implicit $exec %43:sreg_32 = S_ANDN2_B32 %39, $exec_lo, implicit-def $scc %40:sreg_32 = COPY %43 %49:sreg_32 = S_ANDN2_B32 %45, $exec_lo, implicit-def $scc %50:sreg_32 = S_AND_B32 %30, $exec_lo, implicit-def $scc %46:sreg_32 = S_OR_B32 %49, %50, implicit-def $scc bb.5: successors: %bb.6(0x04000000), %bb.2(0x7c000000) %10:sreg_32 = PHI %45, %bb.2, %46, %bb.4 %8:sreg_32 = PHI %39, %bb.2, %40, %bb.4 %9:vgpr_32 = PHI %36, %bb.2, %6, %bb.4 SI_END_CF %4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec %11:sreg_32 = SI_IF_BREAK %10, %2, implicit-def dead $scc %12:sreg_32 = SI_IF_BREAK %8, %0, implicit-def dead $scc SI_LOOP %11, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec S_BRANCH %bb.6 bb.6: successors: %bb.3(0x04000000), %bb.1(0x7c000000) %13:vgpr_32 = PHI %9, %bb.5 SI_END_CF %11, implicit-def dead $exec, implicit-def dead $scc, implicit $exec SI_LOOP %12, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec S_BRANCH %bb.3 ...