; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -march=hexagon < %s | FileCheck %s define void @f0(ptr %a0, i32 %a1, i32 %a2) #0 { ; CHECK-LABEL: f0: ; CHECK: // %bb.0: ; CHECK-NEXT: { ; CHECK-NEXT: p0 = tstbit(r1,#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r2 = asl(r2,#2) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r4 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r3 = #4 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r1 = mux(p0,#-1,#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r4 = insert(r1,r3:2) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r1 = and(r4,#255) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: memb(r0+#0) = r1 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: jumpr r31 ; CHECK-NEXT: } %v0 = load <2 x i1>, ptr %a0 %v1 = trunc i32 %a1 to i1 %v2 = insertelement <2 x i1> %v0, i1 %v1, i32 %a2 store <2 x i1> %v2, ptr %a0 ret void } define void @f1(ptr %a0, i32 %a1, i32 %a2) #0 { ; CHECK-LABEL: f1: ; CHECK: // %bb.0: ; CHECK-NEXT: { ; CHECK-NEXT: p0 = tstbit(r1,#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r2 = asl(r2,#1) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r4 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r3 = #2 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r1 = mux(p0,#-1,#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r4 = insert(r1,r3:2) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r1 = and(r4,#255) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: memb(r0+#0) = r1 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: jumpr r31 ; CHECK-NEXT: } %v0 = load <4 x i1>, ptr %a0 %v1 = trunc i32 %a1 to i1 %v2 = insertelement <4 x i1> %v0, i1 %v1, i32 %a2 store <4 x i1> %v2, ptr %a0 ret void } define void @f2(ptr %a0, i32 %a1, i32 %a2) #0 { ; CHECK-LABEL: f2: ; CHECK: // %bb.0: ; CHECK-NEXT: { ; CHECK-NEXT: p0 = tstbit(r1,#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r6 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r3 = #1 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r4 = mux(p0,#-1,#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r6 = insert(r4,r3:2) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r1 = and(r6,#255) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: memb(r0+#0) = r1 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: jumpr r31 ; CHECK-NEXT: } %v0 = load <8 x i1>, ptr %a0 %v1 = trunc i32 %a1 to i1 %v2 = insertelement <8 x i1> %v0, i1 %v1, i32 %a2 store <8 x i1> %v2, ptr %a0 ret void } attributes #0 = { nounwind "target-features"="-packets" }