; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 ; RUN: llc -march=hexagon < %s | FileCheck %s define void @f0(ptr %a0, ptr %a1, ptr %a2, ptr %a3) { ; CHECK-LABEL: f0: ; CHECK: .cfi_startproc ; CHECK-NEXT: // %bb.0: // %b0 ; CHECK-NEXT: { ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = r0 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r0 = mux(p0,r1,r2) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = r0 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r0 = mux(p0,#1,#0) ; CHECK-NEXT: jumpr r31 ; CHECK-NEXT: memb(r3+#0) = r0.new ; CHECK-NEXT: } b0: %v0 = load i1, ptr %a0 %v1 = load i1, ptr %a1 %v2 = load i1, ptr %a2 %v3 = select i1 %v0, i1 %v1, i1 %v2 store i1 %v3, ptr %a3 ret void } define void @f1(ptr %a0, ptr %a1, ptr %a2, ptr %a3) { ; CHECK-LABEL: f1: ; CHECK: .cfi_startproc ; CHECK-NEXT: // %bb.0: // %b0 ; CHECK-NEXT: { ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = r0 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r0 = mux(p0,r1,r2) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: jumpr r31 ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: memb(r3+#0) = r0.new ; CHECK-NEXT: } b0: %v0 = load i1, ptr %a0 %v1 = load <2 x i1>, ptr %a1 %v2 = load <2 x i1>, ptr %a2 %v3 = select i1 %v0, <2 x i1> %v1, <2 x i1> %v2 store <2 x i1> %v3, ptr %a3 ret void } define void @f2(ptr %a0, ptr %a1, ptr %a2, ptr %a3) { ; CHECK-LABEL: f2: ; CHECK: .cfi_startproc ; CHECK-NEXT: // %bb.0: // %b0 ; CHECK-NEXT: { ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = r0 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r0 = mux(p0,r1,r2) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: jumpr r31 ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: memb(r3+#0) = r0.new ; CHECK-NEXT: } b0: %v0 = load i1, ptr %a0 %v1 = load <4 x i1>, ptr %a1 %v2 = load <4 x i1>, ptr %a2 %v3 = select i1 %v0, <4 x i1> %v1, <4 x i1> %v2 store <4 x i1> %v3, ptr %a3 ret void } define void @f3(ptr %a0, ptr %a1, ptr %a2, ptr %a3) { ; CHECK-LABEL: f3: ; CHECK: .cfi_startproc ; CHECK-NEXT: // %bb.0: // %b0 ; CHECK-NEXT: { ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = r0 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r0 = mux(p0,r1,r2) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: jumpr r31 ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: memb(r3+#0) = r0.new ; CHECK-NEXT: } b0: %v0 = load i1, ptr %a0 %v1 = load <8 x i1>, ptr %a1 %v2 = load <8 x i1>, ptr %a2 %v3 = select i1 %v0, <8 x i1> %v1, <8 x i1> %v2 store <8 x i1> %v3, ptr %a3 ret void } define void @f4(ptr %a0, ptr %a1, ptr %a2, ptr %a3) { ; CHECK-LABEL: f4: ; CHECK: .cfi_startproc ; CHECK-NEXT: // %bb.0: // %b0 ; CHECK-NEXT: { ; CHECK-NEXT: r1 = memub(r1+#0) ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r2 = memub(r2+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = r0 ; CHECK-NEXT: p1 = r1 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p2 = r2 ; CHECK-NEXT: p1 = and(p1,p0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = or(p1,and(p2,!p0)) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r2 = p0 ; CHECK-NEXT: jumpr r31 ; CHECK-NEXT: memb(r3+#0) = r2.new ; CHECK-NEXT: } b0: %v0 = load <2 x i1>, ptr %a0 %v1 = load <2 x i1>, ptr %a1 %v2 = load <2 x i1>, ptr %a2 %v3 = select <2 x i1> %v0, <2 x i1> %v1, <2 x i1> %v2 store <2 x i1> %v3, ptr %a3 ret void } define void @f5(ptr %a0, ptr %a1, ptr %a2, ptr %a3) { ; CHECK-LABEL: f5: ; CHECK: .cfi_startproc ; CHECK-NEXT: // %bb.0: // %b0 ; CHECK-NEXT: { ; CHECK-NEXT: r1 = memub(r1+#0) ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r2 = memub(r2+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = r0 ; CHECK-NEXT: p1 = r1 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p2 = r2 ; CHECK-NEXT: p1 = and(p1,p0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = or(p1,and(p2,!p0)) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r2 = p0 ; CHECK-NEXT: jumpr r31 ; CHECK-NEXT: memb(r3+#0) = r2.new ; CHECK-NEXT: } b0: %v0 = load <4 x i1>, ptr %a0 %v1 = load <4 x i1>, ptr %a1 %v2 = load <4 x i1>, ptr %a2 %v3 = select <4 x i1> %v0, <4 x i1> %v1, <4 x i1> %v2 store <4 x i1> %v3, ptr %a3 ret void } define void @f6(ptr %a0, ptr %a1, ptr %a2, ptr %a3) { ; CHECK-LABEL: f6: ; CHECK: .cfi_startproc ; CHECK-NEXT: // %bb.0: // %b0 ; CHECK-NEXT: { ; CHECK-NEXT: r1 = memub(r1+#0) ; CHECK-NEXT: r0 = memub(r0+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r2 = memub(r2+#0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = r0 ; CHECK-NEXT: p1 = r1 ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p2 = r2 ; CHECK-NEXT: p1 = and(p1,p0) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: p0 = or(p1,and(p2,!p0)) ; CHECK-NEXT: } ; CHECK-NEXT: { ; CHECK-NEXT: r2 = p0 ; CHECK-NEXT: jumpr r31 ; CHECK-NEXT: memb(r3+#0) = r2.new ; CHECK-NEXT: } b0: %v0 = load <8 x i1>, ptr %a0 %v1 = load <8 x i1>, ptr %a1 %v2 = load <8 x i1>, ptr %a2 %v3 = select <8 x i1> %v0, <8 x i1> %v1, <8 x i1> %v2 store <8 x i1> %v3, ptr %a3 ret void }