; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s declare <16 x i8> @llvm.loongarch.lsx.vmax.b(<16 x i8>, <16 x i8>) define <16 x i8> @lsx_vmax_b(<16 x i8> %va, <16 x i8> %vb) nounwind { ; CHECK-LABEL: lsx_vmax_b: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmax.b $vr0, $vr0, $vr1 ; CHECK-NEXT: ret entry: %res = call <16 x i8> @llvm.loongarch.lsx.vmax.b(<16 x i8> %va, <16 x i8> %vb) ret <16 x i8> %res } declare <8 x i16> @llvm.loongarch.lsx.vmax.h(<8 x i16>, <8 x i16>) define <8 x i16> @lsx_vmax_h(<8 x i16> %va, <8 x i16> %vb) nounwind { ; CHECK-LABEL: lsx_vmax_h: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmax.h $vr0, $vr0, $vr1 ; CHECK-NEXT: ret entry: %res = call <8 x i16> @llvm.loongarch.lsx.vmax.h(<8 x i16> %va, <8 x i16> %vb) ret <8 x i16> %res } declare <4 x i32> @llvm.loongarch.lsx.vmax.w(<4 x i32>, <4 x i32>) define <4 x i32> @lsx_vmax_w(<4 x i32> %va, <4 x i32> %vb) nounwind { ; CHECK-LABEL: lsx_vmax_w: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmax.w $vr0, $vr0, $vr1 ; CHECK-NEXT: ret entry: %res = call <4 x i32> @llvm.loongarch.lsx.vmax.w(<4 x i32> %va, <4 x i32> %vb) ret <4 x i32> %res } declare <2 x i64> @llvm.loongarch.lsx.vmax.d(<2 x i64>, <2 x i64>) define <2 x i64> @lsx_vmax_d(<2 x i64> %va, <2 x i64> %vb) nounwind { ; CHECK-LABEL: lsx_vmax_d: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmax.d $vr0, $vr0, $vr1 ; CHECK-NEXT: ret entry: %res = call <2 x i64> @llvm.loongarch.lsx.vmax.d(<2 x i64> %va, <2 x i64> %vb) ret <2 x i64> %res } declare <16 x i8> @llvm.loongarch.lsx.vmaxi.b(<16 x i8>, i32) define <16 x i8> @lsx_vmaxi_b(<16 x i8> %va) nounwind { ; CHECK-LABEL: lsx_vmaxi_b: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmaxi.b $vr0, $vr0, -16 ; CHECK-NEXT: ret entry: %res = call <16 x i8> @llvm.loongarch.lsx.vmaxi.b(<16 x i8> %va, i32 -16) ret <16 x i8> %res } declare <8 x i16> @llvm.loongarch.lsx.vmaxi.h(<8 x i16>, i32) define <8 x i16> @lsx_vmaxi_h(<8 x i16> %va) nounwind { ; CHECK-LABEL: lsx_vmaxi_h: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmaxi.h $vr0, $vr0, -16 ; CHECK-NEXT: ret entry: %res = call <8 x i16> @llvm.loongarch.lsx.vmaxi.h(<8 x i16> %va, i32 -16) ret <8 x i16> %res } declare <4 x i32> @llvm.loongarch.lsx.vmaxi.w(<4 x i32>, i32) define <4 x i32> @lsx_vmaxi_w(<4 x i32> %va) nounwind { ; CHECK-LABEL: lsx_vmaxi_w: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmaxi.w $vr0, $vr0, 15 ; CHECK-NEXT: ret entry: %res = call <4 x i32> @llvm.loongarch.lsx.vmaxi.w(<4 x i32> %va, i32 15) ret <4 x i32> %res } declare <2 x i64> @llvm.loongarch.lsx.vmaxi.d(<2 x i64>, i32) define <2 x i64> @lsx_vmaxi_d(<2 x i64> %va) nounwind { ; CHECK-LABEL: lsx_vmaxi_d: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmaxi.d $vr0, $vr0, 15 ; CHECK-NEXT: ret entry: %res = call <2 x i64> @llvm.loongarch.lsx.vmaxi.d(<2 x i64> %va, i32 15) ret <2 x i64> %res } declare <16 x i8> @llvm.loongarch.lsx.vmax.bu(<16 x i8>, <16 x i8>) define <16 x i8> @lsx_vmax_bu(<16 x i8> %va, <16 x i8> %vb) nounwind { ; CHECK-LABEL: lsx_vmax_bu: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmax.bu $vr0, $vr0, $vr1 ; CHECK-NEXT: ret entry: %res = call <16 x i8> @llvm.loongarch.lsx.vmax.bu(<16 x i8> %va, <16 x i8> %vb) ret <16 x i8> %res } declare <8 x i16> @llvm.loongarch.lsx.vmax.hu(<8 x i16>, <8 x i16>) define <8 x i16> @lsx_vmax_hu(<8 x i16> %va, <8 x i16> %vb) nounwind { ; CHECK-LABEL: lsx_vmax_hu: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmax.hu $vr0, $vr0, $vr1 ; CHECK-NEXT: ret entry: %res = call <8 x i16> @llvm.loongarch.lsx.vmax.hu(<8 x i16> %va, <8 x i16> %vb) ret <8 x i16> %res } declare <4 x i32> @llvm.loongarch.lsx.vmax.wu(<4 x i32>, <4 x i32>) define <4 x i32> @lsx_vmax_wu(<4 x i32> %va, <4 x i32> %vb) nounwind { ; CHECK-LABEL: lsx_vmax_wu: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmax.wu $vr0, $vr0, $vr1 ; CHECK-NEXT: ret entry: %res = call <4 x i32> @llvm.loongarch.lsx.vmax.wu(<4 x i32> %va, <4 x i32> %vb) ret <4 x i32> %res } declare <2 x i64> @llvm.loongarch.lsx.vmax.du(<2 x i64>, <2 x i64>) define <2 x i64> @lsx_vmax_du(<2 x i64> %va, <2 x i64> %vb) nounwind { ; CHECK-LABEL: lsx_vmax_du: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmax.du $vr0, $vr0, $vr1 ; CHECK-NEXT: ret entry: %res = call <2 x i64> @llvm.loongarch.lsx.vmax.du(<2 x i64> %va, <2 x i64> %vb) ret <2 x i64> %res } declare <16 x i8> @llvm.loongarch.lsx.vmaxi.bu(<16 x i8>, i32) define <16 x i8> @lsx_vmaxi_bu(<16 x i8> %va) nounwind { ; CHECK-LABEL: lsx_vmaxi_bu: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmaxi.bu $vr0, $vr0, 1 ; CHECK-NEXT: ret entry: %res = call <16 x i8> @llvm.loongarch.lsx.vmaxi.bu(<16 x i8> %va, i32 1) ret <16 x i8> %res } declare <8 x i16> @llvm.loongarch.lsx.vmaxi.hu(<8 x i16>, i32) define <8 x i16> @lsx_vmaxi_hu(<8 x i16> %va) nounwind { ; CHECK-LABEL: lsx_vmaxi_hu: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmaxi.hu $vr0, $vr0, 1 ; CHECK-NEXT: ret entry: %res = call <8 x i16> @llvm.loongarch.lsx.vmaxi.hu(<8 x i16> %va, i32 1) ret <8 x i16> %res } declare <4 x i32> @llvm.loongarch.lsx.vmaxi.wu(<4 x i32>, i32) define <4 x i32> @lsx_vmaxi_wu(<4 x i32> %va) nounwind { ; CHECK-LABEL: lsx_vmaxi_wu: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmaxi.wu $vr0, $vr0, 31 ; CHECK-NEXT: ret entry: %res = call <4 x i32> @llvm.loongarch.lsx.vmaxi.wu(<4 x i32> %va, i32 31) ret <4 x i32> %res } declare <2 x i64> @llvm.loongarch.lsx.vmaxi.du(<2 x i64>, i32) define <2 x i64> @lsx_vmaxi_du(<2 x i64> %va) nounwind { ; CHECK-LABEL: lsx_vmaxi_du: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmaxi.du $vr0, $vr0, 31 ; CHECK-NEXT: ret entry: %res = call <2 x i64> @llvm.loongarch.lsx.vmaxi.du(<2 x i64> %va, i32 31) ret <2 x i64> %res }