; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \ ; RUN: -mtriple powerpc64-ibm-aix-xcoff -mattr=+aix-small-local-exec-tls < %s \ ; RUN: | FileCheck %s --check-prefix=SMALL-LOCAL-EXEC-SMALLCM64 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \ ; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large \ ; RUN: -mattr=+aix-small-local-exec-tls < %s | FileCheck %s \ ; RUN: --check-prefix=SMALL-LOCAL-EXEC-LARGECM64 @ThreadLocalVarInit = thread_local(localexec) global i16 1, align 2 @VarInit = local_unnamed_addr global i16 87, align 2 @IThreadLocalVarInit = internal thread_local(localexec) global i16 1, align 2 declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull) #1 @b = thread_local(localexec) global [87 x i16] zeroinitializer, align 2 define nonnull ptr @AddrTest1() local_unnamed_addr #0 { ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: AddrTest1: ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: la r3, b[TL]@le(r13) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: addi r3, r3, 4 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr ; ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: AddrTest1: ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: la r3, b[TL]@le(r13) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: addi r3, r3, 4 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr entry: %0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @b) %arrayidx = getelementptr inbounds [87 x i16], ptr %0, i64 0, i64 2 ret ptr %arrayidx } define void @storeITLInit(i16 noundef signext %x) { ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: storeITLInit: ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: sth r3, IThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr ; ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: storeITLInit: ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: sth r3, IThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr entry: %0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @IThreadLocalVarInit) store i16 %x, ptr %0, align 2 ret void } define void @storeTLInit(i16 noundef signext %x) { ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: storeTLInit: ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: sth r3, ThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr ; ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: storeTLInit: ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: sth r3, ThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr entry: %0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @ThreadLocalVarInit) store i16 %x, ptr %0, align 2 ret void } define signext i16 @loadITLInit() { ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: loadITLInit: ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lha r3, IThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr ; ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: loadITLInit: ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lha r3, IThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr entry: %0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @IThreadLocalVarInit) %1 = load i16, ptr %0, align 2 ret i16 %1 } define signext i16 @loadITLInit2() { ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: loadITLInit2: ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: ld r4, L..C0(r2) # @VarInit ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lhz r3, IThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lhz r4, 0(r4) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: add r3, r4, r3 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: extsh r3, r3 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr ; ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: loadITLInit2: ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: addis r4, L..C0@u(r2) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lhz r3, IThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: ld r4, L..C0@l(r4) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lhz r4, 0(r4) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: add r3, r4, r3 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: extsh r3, r3 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr entry: %0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @IThreadLocalVarInit) %1 = load i16, ptr %0, align 2 %2 = load i16, ptr @VarInit, align 2 %add = add i16 %2, %1 ret i16 %add } define signext i16 @loadTLInit() { ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: loadTLInit: ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lha r3, ThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr ; ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: loadTLInit: ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lha r3, ThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr entry: %0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @ThreadLocalVarInit) %1 = load i16, ptr %0, align 2 ret i16 %1 } define signext i16 @loadTLInit2() { ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: loadTLInit2: ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: ld r4, L..C0(r2) # @VarInit ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lhz r3, ThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lhz r4, 0(r4) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: add r3, r4, r3 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: extsh r3, r3 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr ; ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: loadTLInit2: ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: addis r4, L..C0@u(r2) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lhz r3, ThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: ld r4, L..C0@l(r4) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lhz r4, 0(r4) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: add r3, r4, r3 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: extsh r3, r3 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr entry: %0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @ThreadLocalVarInit) %1 = load i16, ptr %0, align 2 %2 = load i16, ptr @VarInit, align 2 %add = add i16 %2, %1 ret i16 %add } define void @loadStore1(i16 noundef signext %x) { ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: loadStore1: ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lhz r3, IThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: addi r3, r3, 9 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: sth r3, IThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr ; ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: loadStore1: ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lhz r3, IThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: addi r3, r3, 9 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: sth r3, IThreadLocalVarInit[TL]@le(r13) ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr entry: %0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @IThreadLocalVarInit) %1 = load i16, ptr %0, align 2 %add = add i16 %1, 9 store i16 %add, ptr %0, align 2 ret void }