# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple powerpc64le-unknown-linux-gnu -mcpu=pwr8 -x mir \ # RUN: -verify-machineinstrs -run-pass ppc-mi-peepholes < %s | FileCheck %s --- name: fold_RLDICL_ANDI tracksRegLiveness: true body: | bb.0.entry: liveins: $x3 ; CHECK-LABEL: name: fold_RLDICL_ANDI ; CHECK: liveins: $x3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 ; CHECK-NEXT: dead [[RLDICL:%[0-9]+]]:g8rc = RLDICL [[COPY]], 0, 32 ; CHECK-NEXT: [[ANDI8_rec:%[0-9]+]]:g8rc = ANDI8_rec killed [[COPY]], 1, implicit-def dead $cr0 ; CHECK-NEXT: $x3 = COPY killed [[ANDI8_rec]] ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3 %1:g8rc = COPY $x3 %2:g8rc = RLDICL %1:g8rc, 0, 32 %3:g8rc = ANDI8_rec killed %2:g8rc, 1, implicit-def dead $cr0 $x3 = COPY %3:g8rc BLR8 implicit $lr8, implicit $rm, implicit $x3 ... --- name: fold_RLDICL_ANDI2 tracksRegLiveness: true body: | bb.0.entry: liveins: $x3 ; CHECK-LABEL: name: fold_RLDICL_ANDI2 ; CHECK: liveins: $x3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 ; CHECK-NEXT: dead [[RLDICL:%[0-9]+]]:g8rc = RLDICL [[COPY]], 10, 60 ; CHECK-NEXT: [[ANDI8_rec:%[0-9]+]]:g8rc = ANDI8_rec killed [[COPY]], 0, implicit-def dead $cr0 ; CHECK-NEXT: $x3 = COPY killed [[ANDI8_rec]] ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3 %1:g8rc = COPY $x3 %2:g8rc = RLDICL %1:g8rc, 10, 60 %3:g8rc = ANDI8_rec killed %2:g8rc, 32, implicit-def dead $cr0 $x3 = COPY %3:g8rc BLR8 implicit $lr8, implicit $rm, implicit $x3 ... --- name: fold_RLDICR_ANDI tracksRegLiveness: true body: | bb.0.entry: liveins: $x3 ; CHECK-LABEL: name: fold_RLDICR_ANDI ; CHECK: liveins: $x3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 ; CHECK-NEXT: dead [[RLDICR:%[0-9]+]]:g8rc = RLDICR [[COPY]], 0, 60 ; CHECK-NEXT: [[ANDI8_rec:%[0-9]+]]:g8rc = ANDI8_rec killed [[COPY]], 16, implicit-def dead $cr0 ; CHECK-NEXT: $x3 = COPY killed [[ANDI8_rec]] ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3 %1:g8rc = COPY $x3 %2:g8rc = RLDICR %1:g8rc, 0, 60 %3:g8rc = ANDI8_rec killed %2:g8rc, 16, implicit-def dead $cr0 $x3 = COPY %3:g8rc BLR8 implicit $lr8, implicit $rm, implicit $x3 ... --- name: fold_RLDICR_ANDI2 tracksRegLiveness: true body: | bb.0.entry: liveins: $x3 ; CHECK-LABEL: name: fold_RLDICR_ANDI2 ; CHECK: liveins: $x3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 ; CHECK-NEXT: dead [[RLDICR:%[0-9]+]]:g8rc = RLDICR [[COPY]], 10, 60 ; CHECK-NEXT: [[ANDI8_rec:%[0-9]+]]:g8rc = ANDI8_rec killed [[COPY]], 0, implicit-def dead $cr0 ; CHECK-NEXT: $x3 = COPY killed [[ANDI8_rec]] ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3 %1:g8rc = COPY $x3 %2:g8rc = RLDICR %1:g8rc, 10, 60 %3:g8rc = ANDI8_rec killed %2:g8rc, 1, implicit-def dead $cr0 $x3 = COPY %3:g8rc BLR8 implicit $lr8, implicit $rm, implicit $x3 ... --- name: fold_RLDICL_ANDIS tracksRegLiveness: true body: | bb.0.entry: liveins: $x3 ; CHECK-LABEL: name: fold_RLDICL_ANDIS ; CHECK: liveins: $x3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 ; CHECK-NEXT: dead [[RLDICL:%[0-9]+]]:g8rc = RLDICL [[COPY]], 0, 32 ; CHECK-NEXT: [[ANDIS8_rec:%[0-9]+]]:g8rc = ANDIS8_rec killed [[COPY]], 1, implicit-def dead $cr0 ; CHECK-NEXT: $x3 = COPY killed [[ANDIS8_rec]] ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3 %1:g8rc = COPY $x3 %2:g8rc = RLDICL %1:g8rc, 0, 32 %3:g8rc = ANDIS8_rec killed %2:g8rc, 1, implicit-def dead $cr0 $x3 = COPY %3:g8rc BLR8 implicit $lr8, implicit $rm, implicit $x3 ... --- name: fold_RLDICL_ANDIS2 tracksRegLiveness: true body: | bb.0.entry: liveins: $x3 ; CHECK-LABEL: name: fold_RLDICL_ANDIS2 ; CHECK: liveins: $x3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 ; CHECK-NEXT: dead [[RLDICL:%[0-9]+]]:g8rc = RLDICL [[COPY]], 10, 60 ; CHECK-NEXT: [[ANDIS8_rec:%[0-9]+]]:g8rc = ANDIS8_rec killed [[COPY]], 0, implicit-def dead $cr0 ; CHECK-NEXT: $x3 = COPY killed [[ANDIS8_rec]] ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3 %1:g8rc = COPY $x3 %2:g8rc = RLDICL %1:g8rc, 10, 60 %3:g8rc = ANDIS8_rec killed %2:g8rc, 16, implicit-def dead $cr0 $x3 = COPY %3:g8rc BLR8 implicit $lr8, implicit $rm, implicit $x3 ... --- name: fold_RLDICR_ANDIS tracksRegLiveness: true body: | bb.0.entry: liveins: $x3 ; CHECK-LABEL: name: fold_RLDICR_ANDIS ; CHECK: liveins: $x3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 ; CHECK-NEXT: dead [[RLDICR:%[0-9]+]]:g8rc = RLDICR [[COPY]], 0, 60 ; CHECK-NEXT: [[ANDIS8_rec:%[0-9]+]]:g8rc = ANDIS8_rec killed [[COPY]], 16, implicit-def dead $cr0 ; CHECK-NEXT: $x3 = COPY killed [[ANDIS8_rec]] ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3 %1:g8rc = COPY $x3 %2:g8rc = RLDICR %1:g8rc, 0, 60 %3:g8rc = ANDIS8_rec killed %2:g8rc, 16, implicit-def dead $cr0 $x3 = COPY %3:g8rc BLR8 implicit $lr8, implicit $rm, implicit $x3 ... --- name: fold_RLDICR_ANDIS2 tracksRegLiveness: true body: | bb.0.entry: liveins: $x3 ; CHECK-LABEL: name: fold_RLDICR_ANDIS2 ; CHECK: liveins: $x3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 ; CHECK-NEXT: dead [[RLDICR:%[0-9]+]]:g8rc = RLDICR [[COPY]], 10, 32 ; CHECK-NEXT: [[ANDIS8_rec:%[0-9]+]]:g8rc = ANDIS8_rec killed [[COPY]], 0, implicit-def dead $cr0 ; CHECK-NEXT: $x3 = COPY killed [[ANDIS8_rec]] ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3 %1:g8rc = COPY $x3 %2:g8rc = RLDICR %1:g8rc, 10, 32 %3:g8rc = ANDIS8_rec killed %2:g8rc, 1, implicit-def dead $cr0 $x3 = COPY %3:g8rc BLR8 implicit $lr8, implicit $rm, implicit $x3 ...