# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=riscv32 -mattr=+f -run-pass=regbankselect -simplify-mir -verify-machineinstrs %s -o - \ # RUN: | FileCheck -check-prefix=RV32F %s --- name: implicit_def_gpr legalized: true body: | bb.0: ; RV32F-LABEL: name: implicit_def_gpr ; RV32F: [[DEF:%[0-9]+]]:gprb(s32) = G_IMPLICIT_DEF ; RV32F-NEXT: [[ADD:%[0-9]+]]:gprb(s32) = G_ADD [[DEF]], [[DEF]] ; RV32F-NEXT: $x10 = COPY [[ADD]](s32) %0:_(s32) = G_IMPLICIT_DEF %1:_(s32) = G_ADD %0, %0 $x10 = COPY %1(s32) ... --- name: implicit_def_copy_gpr legalized: true body: | bb.0: ; RV32F-LABEL: name: implicit_def_copy_gpr ; RV32F: [[DEF:%[0-9]+]]:gprb(s32) = G_IMPLICIT_DEF ; RV32F-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY [[DEF]](s32) ; RV32F-NEXT: $x10 = COPY [[COPY]](s32) %0:_(s32) = G_IMPLICIT_DEF %1:_(s32) = COPY %0(s32) $x10 = COPY %1(s32) ... --- name: implicit_def_fpr legalized: true body: | bb.0: ; RV32F-LABEL: name: implicit_def_fpr ; RV32F: [[DEF:%[0-9]+]]:fprb(s32) = G_IMPLICIT_DEF ; RV32F-NEXT: [[FADD:%[0-9]+]]:fprb(s32) = G_FADD [[DEF]], [[DEF]] ; RV32F-NEXT: $f10_f = COPY [[FADD]](s32) %0:_(s32) = G_IMPLICIT_DEF %1:_(s32) = G_FADD %0, %0 $f10_f = COPY %1(s32) ... --- name: implicit_def_copy_fpr legalized: true body: | bb.0: ; RV32F-LABEL: name: implicit_def_copy_fpr ; RV32F: [[DEF:%[0-9]+]]:fprb(s32) = G_IMPLICIT_DEF ; RV32F-NEXT: $f10_f = COPY [[DEF]](s32) %0:_(s32) = G_IMPLICIT_DEF $f10_f = COPY %0(s32) ...