# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc %s -mtriple=riscv64 -run-pass=peephole-opt -o - | FileCheck %s

# Make sure we shouldn't replace the %2 ADDI with the $x10 ADDI since it has a
# physical register destination.

--- |
  define void @foo(i32 signext %0) {
    tail call void @bar(i32 1)
    %2 = icmp ugt i32 %0, 1
    br i1 %2, label %3, label %4

  3:                                                ; preds = %1
    tail call void @bar(i32 3)
    ret void

  4:                                                ; preds = %1
    ret void
  }

  declare void @bar(...)

...
---
name:            foo
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: foo
  ; CHECK: bb.0 (%ir-block.1):
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT:   liveins: $x10
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr = COPY $x10
  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
  ; CHECK-NEXT:   $x10 = ADDI $x0, 1
  ; CHECK-NEXT:   PseudoCALL target-flags(riscv-call) @bar, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
  ; CHECK-NEXT:   [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 2
  ; CHECK-NEXT:   BLTU [[COPY]], killed [[ADDI]], %bb.2
  ; CHECK-NEXT:   PseudoBR %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1 (%ir-block.3):
  ; CHECK-NEXT:   $x10 = ADDI $x0, 3
  ; CHECK-NEXT:   PseudoTAIL target-flags(riscv-call) @bar, implicit $x2, implicit $x10
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2 (%ir-block.4):
  ; CHECK-NEXT:   PseudoRET
  bb.0 (%ir-block.1):
    successors: %bb.1, %bb.2
    liveins: $x10

    %0:gpr = COPY $x10
    ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
    $x10 = ADDI $x0, 1
    PseudoCALL target-flags(riscv-call) @bar, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
    ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
    %2:gpr = ADDI $x0, 2
    BLTU %0, killed %2, %bb.2
    PseudoBR %bb.1

  bb.1 (%ir-block.3):
    $x10 = ADDI $x0, 3
    PseudoTAIL target-flags(riscv-call) @bar, implicit $x2, implicit $x10

  bb.2 (%ir-block.4):
    PseudoRET

...