; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=riscv64 -mattr=+v < %s \ ; RUN: --verify-machineinstrs | FileCheck %s define @test_1xi1( %in, %in2) nounwind { ; CHECK-LABEL: test_1xi1: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vmand.mm $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_2xi1( %in, %in2) nounwind { ; CHECK-LABEL: test_2xi1: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vmand.mm $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_4xi1( %in, %in2) nounwind { ; CHECK-LABEL: test_4xi1: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vmand.mm $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_8xi1( %in, %in2) nounwind { ; CHECK-LABEL: test_8xi1: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vmand.mm $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_16xi1( %in, %in2) nounwind { ; CHECK-LABEL: test_16xi1: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vmand.mm $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_32xi1( %in, %in2) nounwind { ; CHECK-LABEL: test_32xi1: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vmand.mm $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_64xi1( %in, %in2) nounwind { ; CHECK-LABEL: test_64xi1: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vmand.mm v0, v0, v8 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vmand.mm $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_1xi64( %in, %in2) nounwind { ; CHECK-LABEL: test_1xi64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v9 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_2xi64( %in, %in2) nounwind { ; CHECK-LABEL: test_2xi64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v10 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_4xi64( %in, %in2) nounwind { ; CHECK-LABEL: test_4xi64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v12 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_8xi64( %in, %in2) nounwind { ; CHECK-LABEL: test_8xi64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v16 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_1xi32( %in, %in2) nounwind { ; CHECK-LABEL: test_1xi32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v9 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_2xi32( %in, %in2) nounwind { ; CHECK-LABEL: test_2xi32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v9 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_4xi32( %in, %in2) nounwind { ; CHECK-LABEL: test_4xi32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v10 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_8xi32( %in, %in2) nounwind { ; CHECK-LABEL: test_8xi32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v12 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_16xi32( %in, %in2) nounwind { ; CHECK-LABEL: test_16xi32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v16 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_1xi16( %in, %in2) nounwind { ; CHECK-LABEL: test_1xi16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v9 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_2xi16( %in, %in2) nounwind { ; CHECK-LABEL: test_2xi16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v9 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_4xi16( %in, %in2) nounwind { ; CHECK-LABEL: test_4xi16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v9 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_8xi16( %in, %in2) nounwind { ; CHECK-LABEL: test_8xi16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v10 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_16xi16( %in, %in2) nounwind { ; CHECK-LABEL: test_16xi16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v12 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_32xi16( %in, %in2) nounwind { ; CHECK-LABEL: test_32xi16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v16 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_1xi8( %in, %in2) nounwind { ; CHECK-LABEL: test_1xi8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v9 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_2xi8( %in, %in2) nounwind { ; CHECK-LABEL: test_2xi8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v9 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_4xi8( %in, %in2) nounwind { ; CHECK-LABEL: test_4xi8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v9 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_8xi8( %in, %in2) nounwind { ; CHECK-LABEL: test_8xi8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v9 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_16xi8( %in, %in2) nounwind { ; CHECK-LABEL: test_16xi8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v10 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_32xi8( %in, %in2) nounwind { ; CHECK-LABEL: test_32xi8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v12 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_64xi8( %in, %in2) nounwind { ; CHECK-LABEL: test_64xi8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v16 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"( %in, %in2) ret %0 } define @test_64xi8_with_mask( %in, %in2, %mask) nounwind { ; CHECK-LABEL: test_64xi8_with_mask: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v8, v8, v16, v0.t ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2, $3.t", "=^vr,^vr,^vr,^vm"( %in, %in2, %mask) ret %0 } define @test_specify_reg_mf2( %in, %in2) nounwind { ; CHECK-LABEL: test_specify_reg_mf2: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmv1r.v v2, v9 ; CHECK-NEXT: vmv1r.v v1, v8 ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v0, v1, v2 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: vmv1r.v v8, v0 ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "={v0},{v1},{v2}"( %in, %in2) ret %0 } define @test_specify_reg_m1( %in, %in2) nounwind { ; CHECK-LABEL: test_specify_reg_m1: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmv1r.v v2, v9 ; CHECK-NEXT: vmv1r.v v1, v8 ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v0, v1, v2 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: vmv1r.v v8, v0 ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "={v0},{v1},{v2}"( %in, %in2) ret %0 } define @test_specify_reg_m2( %in, %in2) nounwind { ; CHECK-LABEL: test_specify_reg_m2: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmv2r.v v4, v10 ; CHECK-NEXT: vmv2r.v v2, v8 ; CHECK-NEXT: #APP ; CHECK-NEXT: vadd.vv v0, v2, v4 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: vmv2r.v v8, v0 ; CHECK-NEXT: ret entry: %0 = tail call asm "vadd.vv $0, $1, $2", "={v0},{v2},{v4}"( %in, %in2) ret %0 } define @test_specify_reg_mask( %in, %in2) nounwind { ; CHECK-LABEL: test_specify_reg_mask: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vmv1r.v v2, v8 ; CHECK-NEXT: vmv1r.v v1, v0 ; CHECK-NEXT: #APP ; CHECK-NEXT: vmand.mm v0, v1, v2 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: ret entry: %0 = tail call asm "vmand.mm $0, $1, $2", "={v0},{v1},{v2}"( %in, %in2) ret %0 }