; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=riscv32 -mattr=+v,+f,+d -target-abi=ilp32d \ ; RUN: -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -mtriple=riscv64 -mattr=+v,+f,+d -target-abi=lp64d \ ; RUN: -verify-machineinstrs < %s | FileCheck %s define @llrint_nxv1i64_nxv1f32( %x) { ; CHECK-LABEL: llrint_nxv1i64_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfwcvt.x.f.v v9, v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %a = call @llvm.llrint.nxv1i64.nxv1f32( %x) ret %a } declare @llvm.llrint.nxv1i64.nxv1f32() define @llrint_nxv2i64_nxv2f32( %x) { ; CHECK-LABEL: llrint_nxv2i64_nxv2f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vfwcvt.x.f.v v10, v8 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %a = call @llvm.llrint.nxv2i64.nxv2f32( %x) ret %a } declare @llvm.llrint.nxv2i64.nxv2f32() define @llrint_nxv4i64_nxv4f32( %x) { ; CHECK-LABEL: llrint_nxv4i64_nxv4f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vfwcvt.x.f.v v12, v8 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %a = call @llvm.llrint.nxv4i64.nxv4f32( %x) ret %a } declare @llvm.llrint.nxv4i64.nxv4f32() define @llrint_nxv8i64_nxv8f32( %x) { ; CHECK-LABEL: llrint_nxv8i64_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfwcvt.x.f.v v16, v8 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %a = call @llvm.llrint.nxv8i64.nxv8f32( %x) ret %a } declare @llvm.llrint.nxv8i64.nxv8f32() define @llrint_nxv16i64_nxv16f32( %x) { ; CHECK-LABEL: llrint_nxv16i64_nxv16f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfwcvt.x.f.v v24, v8 ; CHECK-NEXT: vfwcvt.x.f.v v16, v12 ; CHECK-NEXT: vmv8r.v v8, v24 ; CHECK-NEXT: ret %a = call @llvm.llrint.nxv16i64.nxv16f32( %x) ret %a } declare @llvm.llrint.nxv16i64.nxv16f32() define @llrint_nxv1i64_nxv1f64( %x) { ; CHECK-LABEL: llrint_nxv1i64_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfcvt.x.f.v v8, v8 ; CHECK-NEXT: ret %a = call @llvm.llrint.nxv1i64.nxv1f64( %x) ret %a } declare @llvm.llrint.nxv1i64.nxv1f64() define @llrint_nxv2i64_nxv2f64( %x) { ; CHECK-LABEL: llrint_nxv2i64_nxv2f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma ; CHECK-NEXT: vfcvt.x.f.v v8, v8 ; CHECK-NEXT: ret %a = call @llvm.llrint.nxv2i64.nxv2f64( %x) ret %a } declare @llvm.llrint.nxv2i64.nxv2f64() define @llrint_nxv4i64_nxv4f64( %x) { ; CHECK-LABEL: llrint_nxv4i64_nxv4f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma ; CHECK-NEXT: vfcvt.x.f.v v8, v8 ; CHECK-NEXT: ret %a = call @llvm.llrint.nxv4i64.nxv4f64( %x) ret %a } declare @llvm.llrint.nxv4i64.nxv4f64() define @llrint_nxv8i64_nxv8f64( %x) { ; CHECK-LABEL: llrint_nxv8i64_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfcvt.x.f.v v8, v8 ; CHECK-NEXT: ret %a = call @llvm.llrint.nxv8i64.nxv8f64( %x) ret %a } declare @llvm.llrint.nxv8i64.nxv8f64()