; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s declare @llvm.riscv.vmerge.nxv2i32.nxv2i32(, , , , i64); declare @llvm.riscv.vmerge.nxv2f32.nxv2f32(, , , , i64); define @vpmerge_vadd( %passthru, %x, %y, %m, i64 %vl) { ; CHECK-LABEL: vpmerge_vadd: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, mu ; CHECK-NEXT: vadd.vv v8, v9, v10, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vadd.mask.nxv2i32.nxv2i32( %passthru, %x, %y, %m, i64 %vl, i64 1) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 %vl) ret %b } declare @llvm.riscv.vadd.mask.nxv2i32.nxv2i32(, , , , i64, i64) define @vpmerge_vsub( %passthru, %x, %y, %m, i64 %vl) { ; CHECK-LABEL: vpmerge_vsub: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, mu ; CHECK-NEXT: vsub.vv v8, v9, v10, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vsub.mask.nxv2i32.nxv2i32( %passthru, %x, %y, %m, i64 %vl, i64 1) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 %vl) ret %b } declare @llvm.riscv.vsub.mask.nxv2i32.nxv2i32(, , , , i64, i64) define @vpmerge_vfadd( %passthru, %x, %y, %m, i64 %vl) { ; CHECK-LABEL: vpmerge_vfadd: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, mu ; CHECK-NEXT: vfadd.vv v8, v9, v10, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vfadd.mask.nxv2f32.nxv2f32( %passthru, %x, %y, %m, i64 7, i64 %vl, i64 1) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2f32.nxv2f32( %passthru, %passthru, %a, %mask, i64 %vl) ret %b } declare @llvm.riscv.vfadd.mask.nxv2f32.nxv2f32(, , , , i64, i64, i64) define @vpmerge_vfsub( %passthru, %x, %y, %m, i64 %vl) { ; CHECK-LABEL: vpmerge_vfsub: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, mu ; CHECK-NEXT: vfsub.vv v8, v9, v10, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vfsub.mask.nxv2f32.nxv2f32( %passthru, %x, %y, %m, i64 7, i64 %vl, i64 1) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2f32.nxv2f32( %passthru, %passthru, %a, %mask, i64 %vl) ret %b } declare @llvm.riscv.vfsub.mask.nxv2f32.nxv2f32(, , , , i64, i64, i64) define @vpmerge_vwadd( %passthru, %x, %y, %m, i64 %vl) { ; CHECK-LABEL: vpmerge_vwadd: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, tu, mu ; CHECK-NEXT: vwadd.vv v8, v9, v10, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vwadd.mask.nxv2i32.nxv2i16.nxv2i16( %passthru, %x, %y, %m, i64 %vl, i64 1) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 %vl) ret %b } declare @llvm.riscv.vwadd.mask.nxv2i32.nxv2i16.nxv2i16(, , , , i64, i64) define @vpmerge_vle( %passthru, * %p, %m, i64 %vl) { ; CHECK-LABEL: vpmerge_vle: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m1, tu, mu ; CHECK-NEXT: vle32.v v8, (a0), v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vle.mask.nxv2i32( %passthru, * %p, %m, i64 %vl, i64 1) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 %vl) ret %b } declare @llvm.riscv.vle.mask.nxv2i32(, *, , i64, i64) declare @llvm.riscv.vslideup.mask.nxv2i32(, , i64, , i64, i64) define @vpmerge_vslideup( %passthru, %v, i64 %x, %m, i64 %vl) { ; CHECK-LABEL: vpmerge_vslideup: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m1, tu, mu ; CHECK-NEXT: vslideup.vx v8, v9, a0, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vslideup.mask.nxv2i32( %passthru, %v, i64 %x, %m, i64 %vl, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 %vl) ret %b } declare @llvm.riscv.vslidedown.mask.nxv2i32(, , i64, , i64, i64) define @vpmerge_vslidedown( %passthru, %v, i64 %x, %m, i64 %vl) { ; CHECK-LABEL: vpmerge_vslidedown: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m1, tu, mu ; CHECK-NEXT: vslidedown.vx v8, v9, a0, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vslidedown.mask.nxv2i32( %passthru, %v, i64 %x, %m, i64 %vl, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 %vl) ret %b } declare @llvm.riscv.vslide1up.mask.nxv2i32(, , i32, , i64, i64) define @vpmerge_vslide1up( %passthru, %v, i32 %x, %m, i64 %vl) { ; CHECK-LABEL: vpmerge_vslide1up: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m1, tu, mu ; CHECK-NEXT: vslide1up.vx v8, v9, a0, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vslide1up.mask.nxv2i32( %passthru, %v, i32 %x, %m, i64 %vl, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 %vl) ret %b } declare @llvm.riscv.vslide1down.mask.nxv2i32(, , i32, , i64, i64) define @vpmerge_vslide1down( %passthru, %v, i32 %x, %m, i64 %vl) { ; CHECK-LABEL: vpmerge_vslide1down: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m1, tu, mu ; CHECK-NEXT: vslide1down.vx v8, v9, a0, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vslide1down.mask.nxv2i32( %passthru, %v, i32 %x, %m, i64 %vl, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 %vl) ret %b } ; Tests for folding vmerge into its ops when their VLs differ ; Can fold with VL=2 define @vmerge_smaller_vl_same_passthru( %passthru, %x, %y, %m) { ; CHECK-LABEL: vmerge_smaller_vl_same_passthru: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 2, e32, m1, tu, mu ; CHECK-NEXT: vadd.vv v8, v9, v10, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vadd.mask.nxv2i32.nxv2i32( %passthru, %x, %y, %m, i64 3, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 2) ret %b } ; Can fold with VL=2 define @vmerge_larger_vl_same_passthru( %passthru, %x, %y, %m) { ; CHECK-LABEL: vmerge_larger_vl_same_passthru: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 2, e32, m1, tu, mu ; CHECK-NEXT: vadd.vv v8, v9, v10, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vadd.mask.nxv2i32.nxv2i32( %passthru, %x, %y, %m, i64 2, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 3) ret %b } ; Can fold with VL=2 define @vmerge_smaller_vl_different_passthru( %pt1, %pt2, %x, %y, %m) { ; CHECK-LABEL: vmerge_smaller_vl_different_passthru: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 3, e32, m1, tu, mu ; CHECK-NEXT: vadd.vv v8, v10, v11, v0.t ; CHECK-NEXT: vsetivli zero, 2, e32, m1, tu, ma ; CHECK-NEXT: vmv.v.v v9, v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %a = call @llvm.riscv.vadd.mask.nxv2i32.nxv2i32( %pt1, %x, %y, %m, i64 3, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %pt2, %pt2, %a, %mask, i64 2) ret %b } ; Can't fold this because we need to take elements from both %pt1 and %pt2 define @vmerge_larger_vl_different_passthru( %pt1, %pt2, %x, %y, %m) { ; CHECK-LABEL: vmerge_larger_vl_different_passthru: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 2, e32, m1, tu, mu ; CHECK-NEXT: vadd.vv v8, v10, v11, v0.t ; CHECK-NEXT: vsetivli zero, 3, e32, m1, tu, ma ; CHECK-NEXT: vmv.v.v v9, v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %a = call @llvm.riscv.vadd.mask.nxv2i32.nxv2i32( %pt1, %x, %y, %m, i64 2, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %pt2, %pt2, %a, %mask, i64 3) ret %b } ; Can fold with VL=2 define @vmerge_smaller_vl_poison_passthru( %passthru, %x, %y, %m) { ; CHECK-LABEL: vmerge_smaller_vl_poison_passthru: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 2, e32, m1, tu, mu ; CHECK-NEXT: vadd.vv v8, v9, v10, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vadd.mask.nxv2i32.nxv2i32( poison, %x, %y, %m, i64 3, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 2) ret %b } ; Can fold with VL=2 define @vmerge_larger_vl_poison_passthru( %passthru, %x, %y, %m) { ; CHECK-LABEL: vmerge_larger_vl_poison_passthru: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 2, e32, m1, tu, mu ; CHECK-NEXT: vadd.vv v8, v9, v10, v0.t ; CHECK-NEXT: ret %a = call @llvm.riscv.vadd.mask.nxv2i32.nxv2i32( poison, %x, %y, %m, i64 2, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 3) ret %b } ; Test VFCVT_RM declare @llvm.floor.nxv2f32() declare @llvm.vp.merge.nxv2i32(, , , i32) define @vmerge_vfcvt_rm( %passthru, %a, %m, i32 zeroext %evl) { ; CHECK-LABEL: vmerge_vfcvt_rm: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, mu ; CHECK-NEXT: fsrmi a0, 2 ; CHECK-NEXT: vfcvt.x.f.v v8, v9, v0.t ; CHECK-NEXT: fsrm a0 ; CHECK-NEXT: ret entry: %floor = call @llvm.floor.nxv2f32( %a) %i = fptosi %floor to %res = call @llvm.vp.merge.nxv2i32( %m, %i, %passthru, i32 %evl) ret %res } ; Test VIOTA_M declare @llvm.riscv.viota.mask.nxv2i32(, , , i64, i64) define @vpmerge_viota( %passthru, %m, %vm, i32 zeroext %vl) { ; CHECK-LABEL: vpmerge_viota: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, mu ; CHECK-NEXT: viota.m v8, v9, v0.t ; CHECK-NEXT: ret %1 = zext i32 %vl to i64 %a = call @llvm.riscv.viota.mask.nxv2i32( undef, %vm, %m, i64 %1, i64 0) %splat = insertelement poison, i1 -1, i32 0 %mask = shufflevector %splat, poison, zeroinitializer %b = call @llvm.riscv.vmerge.nxv2i32.nxv2i32( %passthru, %passthru, %a, %mask, i64 %1) ret %b }