; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v -target-abi=ilp32d \ ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v -target-abi=lp64d \ ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfhmin,+zvfhmin,+v -target-abi=ilp32d \ ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfhmin,+zvfhmin,+v -target-abi=lp64d \ ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN declare @llvm.copysign.nxv1f16(, ) define @vfcopysign_vv_nxv1f16( %vm, %vs) { ; ZVFH-LABEL: vfcopysign_vv_nxv1f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfsgnj.vv v8, v8, v9 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vv_nxv1f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v9, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %r = call @llvm.copysign.nxv1f16( %vm, %vs) ret %r } define @vfcopysign_vf_nxv1f16( %vm, half %s) { ; ZVFH-LABEL: vfcopysign_vf_nxv1f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfsgnj.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vf_nxv1f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v9, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv1f16( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv1f16( %vm, %vs) { ; ZVFH-LABEL: vfcopynsign_vv_nxv1f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v9 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vv_nxv1f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfneg.v v9, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv1f16( %vm, %n) ret %r } define @vfcopynsign_vf_nxv1f16( %vm, half %s) { ; ZVFH-LABEL: vfcopynsign_vf_nxv1f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfsgnjn.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vf_nxv1f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v9, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfneg.v v9, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv1f16( %vm, %n) ret %r } define @vfcopysign_exttrunc_vv_nxv1f16_nxv1f32( %vm, %vs) { ; ZVFH-LABEL: vfcopysign_exttrunc_vv_nxv1f16_nxv1f32: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v9 ; ZVFH-NEXT: vfsgnj.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_exttrunc_vv_nxv1f16_nxv1f32: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %e = fptrunc %vs to %r = call @llvm.copysign.nxv1f16( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv1f16_nxv1f32( %vm, float %s) { ; ZVFH-LABEL: vfcopysign_exttrunc_vf_nxv1f16_nxv1f32: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; ZVFH-NEXT: vfmv.v.f v9, fa0 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v9 ; ZVFH-NEXT: vfsgnj.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_exttrunc_vf_nxv1f16_nxv1f32: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v9, fa0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fptrunc %splat to %r = call @llvm.copysign.nxv1f16( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv1f16_nxv1f32( %vm, %vs) { ; ZVFH-LABEL: vfcopynsign_exttrunc_vv_nxv1f16_nxv1f32: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v9 ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_exttrunc_vv_nxv1f16_nxv1f32: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfneg.v v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v10, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %n = fneg %vs %eneg = fptrunc %n to %r = call @llvm.copysign.nxv1f16( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv1f16_nxv1f32( %vm, float %s) { ; ZVFH-LABEL: vfcopynsign_exttrunc_vf_nxv1f16_nxv1f32: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; ZVFH-NEXT: vfmv.v.f v9, fa0 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v9 ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_exttrunc_vf_nxv1f16_nxv1f32: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v9, fa0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfneg.v v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v10, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fptrunc %n to %r = call @llvm.copysign.nxv1f16( %vm, %eneg) ret %r } define @vfcopysign_exttrunc_vv_nxv1f16_nxv1f64( %vm, %vs) { ; ZVFH-LABEL: vfcopysign_exttrunc_vv_nxv1f16_nxv1f64: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; ZVFH-NEXT: vfncvt.rod.f.f.w v10, v9 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v9, v10 ; ZVFH-NEXT: vfsgnj.vv v8, v8, v9 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_exttrunc_vv_nxv1f16_nxv1f64: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.rod.f.f.w v10, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v10 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v10, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %e = fptrunc %vs to %r = call @llvm.copysign.nxv1f16( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv1f16_nxv1f64( %vm, double %s) { ; ZVFH-LABEL: vfcopysign_exttrunc_vf_nxv1f16_nxv1f64: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; ZVFH-NEXT: vfmv.v.f v9, fa0 ; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFH-NEXT: vfncvt.rod.f.f.w v10, v9 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v9, v10 ; ZVFH-NEXT: vfsgnj.vv v8, v8, v9 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_exttrunc_vf_nxv1f16_nxv1f64: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v9, fa0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.rod.f.f.w v10, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v10 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v10, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fptrunc %splat to %r = call @llvm.copysign.nxv1f16( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv1f16_nxv1f64( %vm, %vs) { ; ZVFH-LABEL: vfcopynsign_exttrunc_vv_nxv1f16_nxv1f64: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; ZVFH-NEXT: vfncvt.rod.f.f.w v10, v9 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v9, v10 ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v9 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_exttrunc_vv_nxv1f16_nxv1f64: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.rod.f.f.w v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfneg.v v8, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v10, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %n = fneg %vs %eneg = fptrunc %n to %r = call @llvm.copysign.nxv1f16( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv1f16_nxv1f64( %vm, double %s) { ; ZVFH-LABEL: vfcopynsign_exttrunc_vf_nxv1f16_nxv1f64: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; ZVFH-NEXT: vfmv.v.f v9, fa0 ; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFH-NEXT: vfncvt.rod.f.f.w v10, v9 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v9, v10 ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v9 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_exttrunc_vf_nxv1f16_nxv1f64: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v9, fa0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.rod.f.f.w v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfneg.v v8, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v10, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fptrunc %n to %r = call @llvm.copysign.nxv1f16( %vm, %eneg) ret %r } declare @llvm.copysign.nxv2f16(, ) define @vfcopysign_vv_nxv2f16( %vm, %vs) { ; ZVFH-LABEL: vfcopysign_vv_nxv2f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; ZVFH-NEXT: vfsgnj.vv v8, v8, v9 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vv_nxv2f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v9, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %r = call @llvm.copysign.nxv2f16( %vm, %vs) ret %r } define @vfcopysign_vf_nxv2f16( %vm, half %s) { ; ZVFH-LABEL: vfcopysign_vf_nxv2f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; ZVFH-NEXT: vfsgnj.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vf_nxv2f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v9, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv2f16( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv2f16( %vm, %vs) { ; ZVFH-LABEL: vfcopynsign_vv_nxv2f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v9 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vv_nxv2f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma ; ZVFHMIN-NEXT: vfneg.v v9, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv2f16( %vm, %n) ret %r } define @vfcopynsign_vf_nxv2f16( %vm, half %s) { ; ZVFH-LABEL: vfcopynsign_vf_nxv2f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; ZVFH-NEXT: vfsgnjn.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vf_nxv2f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v9, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma ; ZVFHMIN-NEXT: vfneg.v v9, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v9, v9, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv2f16( %vm, %n) ret %r } declare @llvm.copysign.nxv4f16(, ) define @vfcopysign_vv_nxv4f16( %vm, %vs) { ; ZVFH-LABEL: vfcopysign_vv_nxv4f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; ZVFH-NEXT: vfsgnj.vv v8, v8, v9 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vv_nxv4f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v10, v12, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10 ; ZVFHMIN-NEXT: ret %r = call @llvm.copysign.nxv4f16( %vm, %vs) ret %r } define @vfcopysign_vf_nxv4f16( %vm, half %s) { ; ZVFH-LABEL: vfcopysign_vf_nxv4f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; ZVFH-NEXT: vfsgnj.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vf_nxv4f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v10, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v10 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v10, v10, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv4f16( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv4f16( %vm, %vs) { ; ZVFH-LABEL: vfcopynsign_vv_nxv4f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v9 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vv_nxv4f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfneg.v v10, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v10 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v10, v10, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10 ; ZVFHMIN-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv4f16( %vm, %n) ret %r } define @vfcopynsign_vf_nxv4f16( %vm, half %s) { ; ZVFH-LABEL: vfcopynsign_vf_nxv4f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; ZVFH-NEXT: vfsgnjn.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vf_nxv4f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v10, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v10 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfneg.v v10, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v10 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v10, v10, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv4f16( %vm, %n) ret %r } declare @llvm.copysign.nxv8f16(, ) define @vfcopysign_vv_nxv8f16( %vm, %vs) { ; ZVFH-LABEL: vfcopysign_vv_nxv8f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfsgnj.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vv_nxv8f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v16, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %r = call @llvm.copysign.nxv8f16( %vm, %vs) ret %r } define @vfcopysign_vf_nxv8f16( %vm, half %s) { ; ZVFH-LABEL: vfcopysign_vf_nxv8f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfsgnj.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vf_nxv8f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v12, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v12, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv8f16( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv8f16( %vm, %vs) { ; ZVFH-LABEL: vfcopynsign_vv_nxv8f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vv_nxv8f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfneg.v v12, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v12, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv8f16( %vm, %n) ret %r } define @vfcopynsign_vf_nxv8f16( %vm, half %s) { ; ZVFH-LABEL: vfcopynsign_vf_nxv8f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfsgnjn.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vf_nxv8f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v12, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfneg.v v12, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v12, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv8f16( %vm, %n) ret %r } define @vfcopysign_exttrunc_vv_nxv8f16_nxv8f32( %vm, %vs) { ; ZVFH-LABEL: vfcopysign_exttrunc_vv_nxv8f16_nxv8f32: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v12 ; ZVFH-NEXT: vfsgnj.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_exttrunc_vv_nxv8f16_nxv8f32: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v12, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %e = fptrunc %vs to %r = call @llvm.copysign.nxv8f16( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv8f16_nxv8f32( %vm, float %s) { ; ZVFH-LABEL: vfcopysign_exttrunc_vf_nxv8f16_nxv8f32: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; ZVFH-NEXT: vfmv.v.f v12, fa0 ; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v12 ; ZVFH-NEXT: vfsgnj.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_exttrunc_vf_nxv8f16_nxv8f32: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v12, fa0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v12, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fptrunc %splat to %r = call @llvm.copysign.nxv8f16( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv8f16_nxv8f32( %vm, %vs) { ; ZVFH-LABEL: vfcopynsign_exttrunc_vv_nxv8f16_nxv8f32: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v12 ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_exttrunc_vv_nxv8f16_nxv8f32: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfneg.v v8, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v16, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %n = fneg %vs %eneg = fptrunc %n to %r = call @llvm.copysign.nxv8f16( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv8f16_nxv8f32( %vm, float %s) { ; ZVFH-LABEL: vfcopynsign_exttrunc_vf_nxv8f16_nxv8f32: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; ZVFH-NEXT: vfmv.v.f v12, fa0 ; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v12 ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_exttrunc_vf_nxv8f16_nxv8f32: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v12, fa0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfneg.v v8, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v16, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fptrunc %n to %r = call @llvm.copysign.nxv8f16( %vm, %eneg) ret %r } define @vfcopysign_exttrunc_vv_nxv8f16_nxv8f64( %vm, %vs) { ; ZVFH-LABEL: vfcopysign_exttrunc_vv_nxv8f16_nxv8f64: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; ZVFH-NEXT: vfncvt.rod.f.f.w v12, v16 ; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v12 ; ZVFH-NEXT: vfsgnj.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_exttrunc_vv_nxv8f16_nxv8f64: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.rod.f.f.w v12, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v12, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %e = fptrunc %vs to %r = call @llvm.copysign.nxv8f16( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv8f16_nxv8f64( %vm, double %s) { ; ZVFH-LABEL: vfcopysign_exttrunc_vf_nxv8f16_nxv8f64: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; ZVFH-NEXT: vfmv.v.f v16, fa0 ; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFH-NEXT: vfncvt.rod.f.f.w v12, v16 ; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v12 ; ZVFH-NEXT: vfsgnj.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_exttrunc_vf_nxv8f16_nxv8f64: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v16, fa0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.rod.f.f.w v12, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v12, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fptrunc %splat to %r = call @llvm.copysign.nxv8f16( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv8f16_nxv8f64( %vm, %vs) { ; ZVFH-LABEL: vfcopynsign_exttrunc_vv_nxv8f16_nxv8f64: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; ZVFH-NEXT: vfncvt.rod.f.f.w v12, v16 ; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v12 ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_exttrunc_vv_nxv8f16_nxv8f64: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.rod.f.f.w v8, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v16, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfneg.v v8, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v16, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v12, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %n = fneg %vs %eneg = fptrunc %n to %r = call @llvm.copysign.nxv8f16( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv8f16_nxv8f64( %vm, double %s) { ; ZVFH-LABEL: vfcopynsign_exttrunc_vf_nxv8f16_nxv8f64: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; ZVFH-NEXT: vfmv.v.f v16, fa0 ; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFH-NEXT: vfncvt.rod.f.f.w v12, v16 ; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFH-NEXT: vfncvt.f.f.w v10, v12 ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v10 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_exttrunc_vf_nxv8f16_nxv8f64: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v16, fa0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.rod.f.f.w v8, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v16, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfneg.v v8, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v16, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v12, v12, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12 ; ZVFHMIN-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fptrunc %n to %r = call @llvm.copysign.nxv8f16( %vm, %eneg) ret %r } declare @llvm.copysign.nxv16f16(, ) define @vfcopysign_vv_nxv16f16( %vm, %vs) { ; ZVFH-LABEL: vfcopysign_vv_nxv16f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; ZVFH-NEXT: vfsgnj.vv v8, v8, v12 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vv_nxv16f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v16, v24, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16 ; ZVFHMIN-NEXT: ret %r = call @llvm.copysign.nxv16f16( %vm, %vs) ret %r } define @vfcopysign_vf_nxv16f16( %vm, half %s) { ; ZVFH-LABEL: vfcopysign_vf_nxv16f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; ZVFH-NEXT: vfsgnj.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vf_nxv16f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v16, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v16, v16, v24 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv16f16( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv16f16( %vm, %vs) { ; ZVFH-LABEL: vfcopynsign_vv_nxv16f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v12 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vv_nxv16f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfneg.v v16, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v16, v16, v24 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16 ; ZVFHMIN-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv16f16( %vm, %n) ret %r } define @vfcopynsign_vf_nxv16f16( %vm, half %s) { ; ZVFH-LABEL: vfcopynsign_vf_nxv16f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; ZVFH-NEXT: vfsgnjn.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vf_nxv16f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v16, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfneg.v v16, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v16, v16, v24 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv16f16( %vm, %n) ret %r } declare @llvm.copysign.nxv32f16(, ) define @vfcopysign_vv_nxv32f16( %vm, %vs) { ; ZVFH-LABEL: vfcopysign_vv_nxv32f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m8, ta, ma ; ZVFH-NEXT: vfsgnj.vv v8, v8, v16 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vv_nxv32f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v8 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v24, v0, v24 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v16, v16, v24 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16 ; ZVFHMIN-NEXT: ret %r = call @llvm.copysign.nxv32f16( %vm, %vs) ret %r } define @vfcopysign_vf_nxv32f16( %vm, half %s) { ; ZVFH-LABEL: vfcopysign_vf_nxv32f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m8, ta, ma ; ZVFH-NEXT: vfsgnj.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopysign_vf_nxv32f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v16, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v24, v16 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v24 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v16, v16, v0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v16, v16, v0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv32f16( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv32f16( %vm, %vs) { ; ZVFH-LABEL: vfcopynsign_vv_nxv32f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m8, ta, ma ; ZVFH-NEXT: vfsgnjn.vv v8, v8, v16 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vv_nxv32f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfneg.v v24, v24 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v20, v24 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfneg.v v24, v24 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v16, v24 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v24, v24, v0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v20 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v16, v24, v0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16 ; ZVFHMIN-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv32f16( %vm, %n) ret %r } define @vfcopynsign_vf_nxv32f16( %vm, half %s) { ; ZVFH-LABEL: vfcopynsign_vf_nxv32f16: ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e16, m8, ta, ma ; ZVFH-NEXT: vfsgnjn.vf v8, v8, fa0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfcopynsign_vf_nxv32f16: ; ZVFHMIN: # %bb.0: ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; ZVFHMIN-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfmv.v.f v16, fa5 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v24, v16 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v24 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfneg.v v16, v16 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v24, v16 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v24 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v16, v16, v0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma ; ZVFHMIN-NEXT: vfsgnj.vv v16, v16, v0 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16 ; ZVFHMIN-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv32f16( %vm, %n) ret %r } declare @llvm.copysign.nxv1f32(, ) define @vfcopysign_vv_nxv1f32( %vm, %vs) { ; CHECK-LABEL: vfcopysign_vv_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v9 ; CHECK-NEXT: ret %r = call @llvm.copysign.nxv1f32( %vm, %vs) ret %r } define @vfcopysign_vf_nxv1f32( %vm, float %s) { ; CHECK-LABEL: vfcopysign_vf_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv1f32( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv1f32( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_vv_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v9 ; CHECK-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv1f32( %vm, %n) ret %r } define @vfcopynsign_vf_nxv1f32( %vm, float %s) { ; CHECK-LABEL: vfcopynsign_vf_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv1f32( %vm, %n) ret %r } define @vfcopysign_exttrunc_vv_nxv1f32_nxv1f16( %vm, %vs) { ; CHECK-LABEL: vfcopysign_exttrunc_vv_nxv1f32_nxv1f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v10, v9 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v10 ; CHECK-NEXT: ret %e = fpext %vs to %r = call @llvm.copysign.nxv1f32( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv1f32_nxv1f16( %vm, half %s) { ; CHECK-LABEL: vfcopysign_exttrunc_vf_nxv1f32_nxv1f16: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.s.h fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fpext %splat to %r = call @llvm.copysign.nxv1f32( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv1f32_nxv1f16( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_exttrunc_vv_nxv1f32_nxv1f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v10, v9 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v10 ; CHECK-NEXT: ret %n = fneg %vs %eneg = fpext %n to %r = call @llvm.copysign.nxv1f32( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv1f32_nxv1f16( %vm, half %s) { ; CHECK-LABEL: vfcopynsign_exttrunc_vf_nxv1f32_nxv1f16: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.s.h fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fpext %n to %r = call @llvm.copysign.nxv1f32( %vm, %eneg) ret %r } define @vfcopysign_exttrunc_vv_nxv1f32_nxv1f64( %vm, %vs) { ; CHECK-LABEL: vfcopysign_exttrunc_vv_nxv1f32_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfncvt.f.f.w v10, v9 ; CHECK-NEXT: vfsgnj.vv v8, v8, v10 ; CHECK-NEXT: ret %e = fptrunc %vs to %r = call @llvm.copysign.nxv1f32( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv1f32_nxv1f64( %vm, double %s) { ; CHECK-LABEL: vfcopysign_exttrunc_vf_nxv1f32_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfmv.v.f v9, fa0 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfncvt.f.f.w v10, v9 ; CHECK-NEXT: vfsgnj.vv v8, v8, v10 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fptrunc %splat to %r = call @llvm.copysign.nxv1f32( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv1f32_nxv1f64( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_exttrunc_vv_nxv1f32_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfncvt.f.f.w v10, v9 ; CHECK-NEXT: vfsgnjn.vv v8, v8, v10 ; CHECK-NEXT: ret %n = fneg %vs %eneg = fptrunc %n to %r = call @llvm.copysign.nxv1f32( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv1f32_nxv1f64( %vm, double %s) { ; CHECK-LABEL: vfcopynsign_exttrunc_vf_nxv1f32_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfmv.v.f v9, fa0 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfncvt.f.f.w v10, v9 ; CHECK-NEXT: vfsgnjn.vv v8, v8, v10 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fptrunc %n to %r = call @llvm.copysign.nxv1f32( %vm, %eneg) ret %r } declare @llvm.copysign.nxv2f32(, ) define @vfcopysign_vv_nxv2f32( %vm, %vs) { ; CHECK-LABEL: vfcopysign_vv_nxv2f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v9 ; CHECK-NEXT: ret %r = call @llvm.copysign.nxv2f32( %vm, %vs) ret %r } define @vfcopysign_vf_nxv2f32( %vm, float %s) { ; CHECK-LABEL: vfcopysign_vf_nxv2f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv2f32( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv2f32( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_vv_nxv2f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v9 ; CHECK-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv2f32( %vm, %n) ret %r } define @vfcopynsign_vf_nxv2f32( %vm, float %s) { ; CHECK-LABEL: vfcopynsign_vf_nxv2f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv2f32( %vm, %n) ret %r } declare @llvm.copysign.nxv4f32(, ) define @vfcopysign_vv_nxv4f32( %vm, %vs) { ; CHECK-LABEL: vfcopysign_vv_nxv4f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v10 ; CHECK-NEXT: ret %r = call @llvm.copysign.nxv4f32( %vm, %vs) ret %r } define @vfcopysign_vf_nxv4f32( %vm, float %s) { ; CHECK-LABEL: vfcopysign_vf_nxv4f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv4f32( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv4f32( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_vv_nxv4f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v10 ; CHECK-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv4f32( %vm, %n) ret %r } define @vfcopynsign_vf_nxv4f32( %vm, float %s) { ; CHECK-LABEL: vfcopynsign_vf_nxv4f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv4f32( %vm, %n) ret %r } declare @llvm.copysign.nxv8f32(, ) define @vfcopysign_vv_nxv8f32( %vm, %vs) { ; CHECK-LABEL: vfcopysign_vv_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v12 ; CHECK-NEXT: ret %r = call @llvm.copysign.nxv8f32( %vm, %vs) ret %r } define @vfcopysign_vf_nxv8f32( %vm, float %s) { ; CHECK-LABEL: vfcopysign_vf_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv8f32( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv8f32( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_vv_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v12 ; CHECK-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv8f32( %vm, %n) ret %r } define @vfcopynsign_vf_nxv8f32( %vm, float %s) { ; CHECK-LABEL: vfcopynsign_vf_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv8f32( %vm, %n) ret %r } define @vfcopysign_exttrunc_vv_nxv8f32_nxv8f16( %vm, %vs) { ; CHECK-LABEL: vfcopysign_exttrunc_vv_nxv8f32_nxv8f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v16, v12 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v16 ; CHECK-NEXT: ret %e = fpext %vs to %r = call @llvm.copysign.nxv8f32( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv8f32_nxv8f16( %vm, half %s) { ; CHECK-LABEL: vfcopysign_exttrunc_vf_nxv8f32_nxv8f16: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.s.h fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fpext %splat to %r = call @llvm.copysign.nxv8f32( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv8f32_nxv8f16( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_exttrunc_vv_nxv8f32_nxv8f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v16, v12 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v16 ; CHECK-NEXT: ret %n = fneg %vs %eneg = fpext %n to %r = call @llvm.copysign.nxv8f32( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv8f32_nxv8f16( %vm, half %s) { ; CHECK-LABEL: vfcopynsign_exttrunc_vf_nxv8f32_nxv8f16: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.s.h fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fpext %n to %r = call @llvm.copysign.nxv8f32( %vm, %eneg) ret %r } define @vfcopysign_exttrunc_vv_nxv8f32_nxv8f64( %vm, %vs) { ; CHECK-LABEL: vfcopysign_exttrunc_vv_nxv8f32_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfncvt.f.f.w v12, v16 ; CHECK-NEXT: vfsgnj.vv v8, v8, v12 ; CHECK-NEXT: ret %e = fptrunc %vs to %r = call @llvm.copysign.nxv8f32( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv8f32_nxv8f64( %vm, double %s) { ; CHECK-LABEL: vfcopysign_exttrunc_vf_nxv8f32_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfmv.v.f v16, fa0 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; CHECK-NEXT: vfncvt.f.f.w v12, v16 ; CHECK-NEXT: vfsgnj.vv v8, v8, v12 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fptrunc %splat to %r = call @llvm.copysign.nxv8f32( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv8f32_nxv8f64( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_exttrunc_vv_nxv8f32_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfncvt.f.f.w v12, v16 ; CHECK-NEXT: vfsgnjn.vv v8, v8, v12 ; CHECK-NEXT: ret %n = fneg %vs %eneg = fptrunc %n to %r = call @llvm.copysign.nxv8f32( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv8f32_nxv8f64( %vm, double %s) { ; CHECK-LABEL: vfcopynsign_exttrunc_vf_nxv8f32_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfmv.v.f v16, fa0 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; CHECK-NEXT: vfncvt.f.f.w v12, v16 ; CHECK-NEXT: vfsgnjn.vv v8, v8, v12 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fptrunc %n to %r = call @llvm.copysign.nxv8f32( %vm, %eneg) ret %r } declare @llvm.copysign.nxv16f32(, ) define @vfcopysign_vv_nxv16f32( %vm, %vs) { ; CHECK-LABEL: vfcopysign_vv_nxv16f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v16 ; CHECK-NEXT: ret %r = call @llvm.copysign.nxv16f32( %vm, %vs) ret %r } define @vfcopysign_vf_nxv16f32( %vm, float %s) { ; CHECK-LABEL: vfcopysign_vf_nxv16f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv16f32( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv16f32( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_vv_nxv16f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v16 ; CHECK-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv16f32( %vm, %n) ret %r } define @vfcopynsign_vf_nxv16f32( %vm, float %s) { ; CHECK-LABEL: vfcopynsign_vf_nxv16f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv16f32( %vm, %n) ret %r } declare @llvm.copysign.nxv1f64(, ) define @vfcopysign_vv_nxv1f64( %vm, %vs) { ; CHECK-LABEL: vfcopysign_vv_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v9 ; CHECK-NEXT: ret %r = call @llvm.copysign.nxv1f64( %vm, %vs) ret %r } define @vfcopysign_vf_nxv1f64( %vm, double %s) { ; CHECK-LABEL: vfcopysign_vf_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv1f64( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv1f64( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_vv_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v9 ; CHECK-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv1f64( %vm, %n) ret %r } define @vfcopynsign_vf_nxv1f64( %vm, double %s) { ; CHECK-LABEL: vfcopynsign_vf_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv1f64( %vm, %n) ret %r } define @vfcopysign_exttrunc_vv_nxv1f64_nxv1f16( %vm, %vs) { ; CHECK-LABEL: vfcopysign_exttrunc_vv_nxv1f64_nxv1f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v10, v9 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v9, v10 ; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v9 ; CHECK-NEXT: ret %e = fpext %vs to %r = call @llvm.copysign.nxv1f64( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv1f64_nxv1f16( %vm, half %s) { ; CHECK-LABEL: vfcopysign_exttrunc_vf_nxv1f64_nxv1f16: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.d.h fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fpext %splat to %r = call @llvm.copysign.nxv1f64( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv1f64_nxv1f16( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_exttrunc_vv_nxv1f64_nxv1f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v10, v9 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v9, v10 ; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v9 ; CHECK-NEXT: ret %n = fneg %vs %eneg = fpext %n to %r = call @llvm.copysign.nxv1f64( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv1f64_nxv1f16( %vm, half %s) { ; CHECK-LABEL: vfcopynsign_exttrunc_vf_nxv1f64_nxv1f16: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.d.h fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fpext %n to %r = call @llvm.copysign.nxv1f64( %vm, %eneg) ret %r } define @vfcopysign_exttrunc_vv_nxv1f64_nxv1f32( %vm, %vs) { ; CHECK-LABEL: vfcopysign_exttrunc_vv_nxv1f64_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v10, v9 ; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v10 ; CHECK-NEXT: ret %e = fpext %vs to %r = call @llvm.copysign.nxv1f64( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv1f64_nxv1f32( %vm, float %s) { ; CHECK-LABEL: vfcopysign_exttrunc_vf_nxv1f64_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.d.s fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fpext %splat to %r = call @llvm.copysign.nxv1f64( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv1f64_nxv1f32( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_exttrunc_vv_nxv1f64_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v10, v9 ; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v10 ; CHECK-NEXT: ret %n = fneg %vs %eneg = fpext %n to %r = call @llvm.copysign.nxv1f64( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv1f64_nxv1f32( %vm, float %s) { ; CHECK-LABEL: vfcopynsign_exttrunc_vf_nxv1f64_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.d.s fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fpext %n to %r = call @llvm.copysign.nxv1f64( %vm, %eneg) ret %r } declare @llvm.copysign.nxv2f64(, ) define @vfcopysign_vv_nxv2f64( %vm, %vs) { ; CHECK-LABEL: vfcopysign_vv_nxv2f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v10 ; CHECK-NEXT: ret %r = call @llvm.copysign.nxv2f64( %vm, %vs) ret %r } define @vfcopysign_vf_nxv2f64( %vm, double %s) { ; CHECK-LABEL: vfcopysign_vf_nxv2f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv2f64( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv2f64( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_vv_nxv2f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v10 ; CHECK-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv2f64( %vm, %n) ret %r } define @vfcopynsign_vf_nxv2f64( %vm, double %s) { ; CHECK-LABEL: vfcopynsign_vf_nxv2f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv2f64( %vm, %n) ret %r } declare @llvm.copysign.nxv4f64(, ) define @vfcopysign_vv_nxv4f64( %vm, %vs) { ; CHECK-LABEL: vfcopysign_vv_nxv4f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v12 ; CHECK-NEXT: ret %r = call @llvm.copysign.nxv4f64( %vm, %vs) ret %r } define @vfcopysign_vf_nxv4f64( %vm, double %s) { ; CHECK-LABEL: vfcopysign_vf_nxv4f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv4f64( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv4f64( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_vv_nxv4f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v12 ; CHECK-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv4f64( %vm, %n) ret %r } define @vfcopynsign_vf_nxv4f64( %vm, double %s) { ; CHECK-LABEL: vfcopynsign_vf_nxv4f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv4f64( %vm, %n) ret %r } declare @llvm.copysign.nxv8f64(, ) define @vfcopysign_vv_nxv8f64( %vm, %vs) { ; CHECK-LABEL: vfcopysign_vv_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v16 ; CHECK-NEXT: ret %r = call @llvm.copysign.nxv8f64( %vm, %vs) ret %r } define @vfcopysign_vf_nxv8f64( %vm, double %s) { ; CHECK-LABEL: vfcopysign_vf_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %r = call @llvm.copysign.nxv8f64( %vm, %splat) ret %r } define @vfcopynsign_vv_nxv8f64( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_vv_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v16 ; CHECK-NEXT: ret %n = fneg %vs %r = call @llvm.copysign.nxv8f64( %vm, %n) ret %r } define @vfcopynsign_vf_nxv8f64( %vm, double %s) { ; CHECK-LABEL: vfcopynsign_vf_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa0 ; CHECK-NEXT: ret %head = insertelement poison, double %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %r = call @llvm.copysign.nxv8f64( %vm, %n) ret %r } define @vfcopysign_exttrunc_vv_nxv8f64_nxv8f16( %vm, %vs) { ; CHECK-LABEL: vfcopysign_exttrunc_vv_nxv8f64_nxv8f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v20, v16 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v24, v20 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v24 ; CHECK-NEXT: ret %e = fpext %vs to %r = call @llvm.copysign.nxv8f64( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv8f64_nxv8f16( %vm, half %s) { ; CHECK-LABEL: vfcopysign_exttrunc_vf_nxv8f64_nxv8f16: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.d.h fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fpext %splat to %r = call @llvm.copysign.nxv8f64( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv8f64_nxv8f16( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_exttrunc_vv_nxv8f64_nxv8f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v20, v16 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v24, v20 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v24 ; CHECK-NEXT: ret %n = fneg %vs %eneg = fpext %n to %r = call @llvm.copysign.nxv8f64( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv8f64_nxv8f16( %vm, half %s) { ; CHECK-LABEL: vfcopynsign_exttrunc_vf_nxv8f64_nxv8f16: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.d.h fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, half %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fpext %n to %r = call @llvm.copysign.nxv8f64( %vm, %eneg) ret %r } define @vfcopysign_exttrunc_vv_nxv8f64_nxv8f32( %vm, %vs) { ; CHECK-LABEL: vfcopysign_exttrunc_vv_nxv8f64_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v24, v16 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnj.vv v8, v8, v24 ; CHECK-NEXT: ret %e = fpext %vs to %r = call @llvm.copysign.nxv8f64( %vm, %e) ret %r } define @vfcopysign_exttrunc_vf_nxv8f64_nxv8f32( %vm, float %s) { ; CHECK-LABEL: vfcopysign_exttrunc_vf_nxv8f64_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.d.s fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnj.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %esplat = fpext %splat to %r = call @llvm.copysign.nxv8f64( %vm, %esplat) ret %r } define @vfcopynsign_exttrunc_vv_nxv8f64_nxv8f32( %vm, %vs) { ; CHECK-LABEL: vfcopynsign_exttrunc_vv_nxv8f64_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfwcvt.f.f.v v24, v16 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnjn.vv v8, v8, v24 ; CHECK-NEXT: ret %n = fneg %vs %eneg = fpext %n to %r = call @llvm.copysign.nxv8f64( %vm, %eneg) ret %r } define @vfcopynsign_exttrunc_vf_nxv8f64_nxv8f32( %vm, float %s) { ; CHECK-LABEL: vfcopynsign_exttrunc_vf_nxv8f64_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: fcvt.d.s fa5, fa0 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vfsgnjn.vf v8, v8, fa5 ; CHECK-NEXT: ret %head = insertelement poison, float %s, i32 0 %splat = shufflevector %head, poison, zeroinitializer %n = fneg %splat %eneg = fpext %n to %r = call @llvm.copysign.nxv8f64( %vm, %eneg) ret %r } define @fptrunc_of_copysign_nxv2f32_nxv2f64( %X, %Y) { ; CHECK-LABEL: fptrunc_of_copysign_nxv2f32_nxv2f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma ; CHECK-NEXT: vfsgnj.vv v10, v8, v10 ; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma ; CHECK-NEXT: vfncvt.f.f.w v8, v10 ; CHECK-NEXT: ret %copy = call fast @llvm.copysign.nxv2f64( %X, %Y) %trunc = fptrunc %copy to ret %trunc }