; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+zfh,+zvfh \ ; RUN: -verify-machineinstrs -target-abi=ilp32d | FileCheck %s ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+zfh,+zvfh \ ; RUN: -verify-machineinstrs -target-abi=lp64d | FileCheck %s declare @llvm.riscv.vluxei.nxv1i8.nxv1i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i8_nxv1i8_nxv1i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i8_nxv1i8_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma ; CHECK-NEXT: vluxei32.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i8.nxv1i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i8.nxv1i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i8_nxv1i8_nxv1i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i8_nxv1i8_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i8.nxv1i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i8.nxv2i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i8_nxv2i8_nxv2i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i8_nxv2i8_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma ; CHECK-NEXT: vluxei32.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i8.nxv2i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i8.nxv2i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i8_nxv2i8_nxv2i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i8_nxv2i8_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i8.nxv2i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i8.nxv4i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i8_nxv4i8_nxv4i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i8_nxv4i8_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma ; CHECK-NEXT: vluxei32.v v10, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i8.nxv4i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i8.nxv4i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i8_nxv4i8_nxv4i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i8_nxv4i8_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i8.nxv4i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i8.nxv8i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i8_nxv8i8_nxv8i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i8_nxv8i8_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma ; CHECK-NEXT: vluxei32.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i8.nxv8i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i8.nxv8i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i8_nxv8i8_nxv8i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i8_nxv8i8_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i8.nxv8i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16i8.nxv16i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv16i8_nxv16i8_nxv16i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16i8_nxv16i8_nxv16i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma ; CHECK-NEXT: vluxei32.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16i8.nxv16i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16i8.nxv16i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16i8_nxv16i8_nxv16i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16i8_nxv16i8_nxv16i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16i8.nxv16i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i16.nxv1i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i16_nxv1i16_nxv1i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i16_nxv1i16_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma ; CHECK-NEXT: vluxei32.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i16.nxv1i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i16.nxv1i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i16_nxv1i16_nxv1i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i16_nxv1i16_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i16.nxv1i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i16.nxv2i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i16_nxv2i16_nxv2i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i16_nxv2i16_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma ; CHECK-NEXT: vluxei32.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i16.nxv2i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i16.nxv2i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i16_nxv2i16_nxv2i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i16_nxv2i16_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i16.nxv2i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i16.nxv4i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i16_nxv4i16_nxv4i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i16_nxv4i16_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma ; CHECK-NEXT: vluxei32.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i16.nxv4i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i16.nxv4i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i16_nxv4i16_nxv4i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i16_nxv4i16_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i16.nxv4i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i16.nxv8i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i16_nxv8i16_nxv8i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i16_nxv8i16_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma ; CHECK-NEXT: vluxei32.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i16.nxv8i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i16.nxv8i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i16_nxv8i16_nxv8i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i16_nxv8i16_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i16.nxv8i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16i16.nxv16i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv16i16_nxv16i16_nxv16i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16i16_nxv16i16_nxv16i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma ; CHECK-NEXT: vluxei32.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16i16.nxv16i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16i16.nxv16i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16i16_nxv16i16_nxv16i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16i16_nxv16i16_nxv16i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16i16.nxv16i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i32.nxv1i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i32_nxv1i32_nxv1i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i32_nxv1i32_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma ; CHECK-NEXT: vluxei32.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i32.nxv1i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i32.nxv1i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i32_nxv1i32_nxv1i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i32_nxv1i32_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i32.nxv1i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i32.nxv2i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i32_nxv2i32_nxv2i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i32_nxv2i32_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma ; CHECK-NEXT: vluxei32.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i32.nxv2i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i32.nxv2i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i32_nxv2i32_nxv2i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i32_nxv2i32_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i32.nxv2i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i32.nxv4i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i32_nxv4i32_nxv4i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i32_nxv4i32_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma ; CHECK-NEXT: vluxei32.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i32.nxv4i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i32.nxv4i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i32_nxv4i32_nxv4i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i32_nxv4i32_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i32.nxv4i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i32.nxv8i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i32_nxv8i32_nxv8i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i32_nxv8i32_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma ; CHECK-NEXT: vluxei32.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i32.nxv8i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i32.nxv8i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i32_nxv8i32_nxv8i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i32_nxv8i32_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i32.nxv8i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16i32.nxv16i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv16i32_nxv16i32_nxv16i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16i32_nxv16i32_nxv16i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma ; CHECK-NEXT: vluxei32.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16i32.nxv16i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16i32.nxv16i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16i32_nxv16i32_nxv16i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16i32_nxv16i32_nxv16i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16i32.nxv16i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i64.nxv1i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i64_nxv1i64_nxv1i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i64_nxv1i64_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma ; CHECK-NEXT: vluxei32.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i64.nxv1i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i64.nxv1i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i64_nxv1i64_nxv1i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i64_nxv1i64_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i64.nxv1i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i64.nxv2i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i64_nxv2i64_nxv2i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i64_nxv2i64_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma ; CHECK-NEXT: vluxei32.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i64.nxv2i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i64.nxv2i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i64_nxv2i64_nxv2i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i64_nxv2i64_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i64.nxv2i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i64.nxv4i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i64_nxv4i64_nxv4i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i64_nxv4i64_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma ; CHECK-NEXT: vluxei32.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i64.nxv4i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i64.nxv4i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i64_nxv4i64_nxv4i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i64_nxv4i64_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i64.nxv4i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i64.nxv8i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i64_nxv8i64_nxv8i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i64_nxv8i64_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma ; CHECK-NEXT: vluxei32.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i64.nxv8i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i64.nxv8i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i64_nxv8i64_nxv8i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i64_nxv8i64_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i64.nxv8i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1f16.nxv1i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv1f16_nxv1f16_nxv1i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1f16_nxv1f16_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma ; CHECK-NEXT: vluxei32.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1f16.nxv1i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1f16.nxv1i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1f16_nxv1f16_nxv1i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1f16_nxv1f16_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1f16.nxv1i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2f16.nxv2i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv2f16_nxv2f16_nxv2i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2f16_nxv2f16_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma ; CHECK-NEXT: vluxei32.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2f16.nxv2i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2f16.nxv2i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2f16_nxv2f16_nxv2i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2f16_nxv2f16_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2f16.nxv2i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4f16.nxv4i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv4f16_nxv4f16_nxv4i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4f16_nxv4f16_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma ; CHECK-NEXT: vluxei32.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4f16.nxv4i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4f16.nxv4i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4f16_nxv4f16_nxv4i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4f16_nxv4f16_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4f16.nxv4i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8f16.nxv8i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv8f16_nxv8f16_nxv8i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8f16_nxv8f16_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma ; CHECK-NEXT: vluxei32.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8f16.nxv8i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8f16.nxv8i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8f16_nxv8f16_nxv8i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8f16_nxv8f16_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8f16.nxv8i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16f16.nxv16i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv16f16_nxv16f16_nxv16i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16f16_nxv16f16_nxv16i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma ; CHECK-NEXT: vluxei32.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16f16.nxv16i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16f16.nxv16i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16f16_nxv16f16_nxv16i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16f16_nxv16f16_nxv16i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16f16.nxv16i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1f32.nxv1i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv1f32_nxv1f32_nxv1i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1f32_nxv1f32_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma ; CHECK-NEXT: vluxei32.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1f32.nxv1i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1f32.nxv1i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1f32_nxv1f32_nxv1i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1f32_nxv1f32_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1f32.nxv1i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2f32.nxv2i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv2f32_nxv2f32_nxv2i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2f32_nxv2f32_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma ; CHECK-NEXT: vluxei32.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2f32.nxv2i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2f32.nxv2i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2f32_nxv2f32_nxv2i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2f32_nxv2f32_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2f32.nxv2i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4f32.nxv4i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv4f32_nxv4f32_nxv4i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4f32_nxv4f32_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma ; CHECK-NEXT: vluxei32.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4f32.nxv4i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4f32.nxv4i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4f32_nxv4f32_nxv4i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4f32_nxv4f32_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4f32.nxv4i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8f32.nxv8i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv8f32_nxv8f32_nxv8i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8f32_nxv8f32_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma ; CHECK-NEXT: vluxei32.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8f32.nxv8i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8f32.nxv8i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8f32_nxv8f32_nxv8i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8f32_nxv8f32_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8f32.nxv8i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16f32.nxv16i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv16f32_nxv16f32_nxv16i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16f32_nxv16f32_nxv16i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma ; CHECK-NEXT: vluxei32.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16f32.nxv16i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16f32.nxv16i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16f32_nxv16f32_nxv16i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16f32_nxv16f32_nxv16i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16f32.nxv16i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1f64.nxv1i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv1f64_nxv1f64_nxv1i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1f64_nxv1f64_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma ; CHECK-NEXT: vluxei32.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1f64.nxv1i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1f64.nxv1i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1f64_nxv1f64_nxv1i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1f64_nxv1f64_nxv1i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1f64.nxv1i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2f64.nxv2i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv2f64_nxv2f64_nxv2i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2f64_nxv2f64_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma ; CHECK-NEXT: vluxei32.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2f64.nxv2i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2f64.nxv2i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2f64_nxv2f64_nxv2i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2f64_nxv2f64_nxv2i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2f64.nxv2i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4f64.nxv4i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv4f64_nxv4f64_nxv4i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4f64_nxv4f64_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma ; CHECK-NEXT: vluxei32.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4f64.nxv4i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4f64.nxv4i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4f64_nxv4f64_nxv4i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4f64_nxv4f64_nxv4i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4f64.nxv4i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8f64.nxv8i32( , *, , iXLen); define @intrinsic_vluxei_v_nxv8f64_nxv8f64_nxv8i32(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8f64_nxv8f64_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma ; CHECK-NEXT: vluxei32.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8f64.nxv8i32( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8f64.nxv8i32( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8f64_nxv8f64_nxv8i32( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8f64_nxv8f64_nxv8i32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, mu ; CHECK-NEXT: vluxei32.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8f64.nxv8i32( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i8.nxv1i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i8_nxv1i8_nxv1i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i8_nxv1i8_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma ; CHECK-NEXT: vluxei16.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i8.nxv1i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i8.nxv1i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i8_nxv1i8_nxv1i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i8_nxv1i8_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i8.nxv1i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i8.nxv2i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i8_nxv2i8_nxv2i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i8_nxv2i8_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma ; CHECK-NEXT: vluxei16.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i8.nxv2i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i8.nxv2i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i8_nxv2i8_nxv2i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i8_nxv2i8_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i8.nxv2i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i8.nxv4i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i8_nxv4i8_nxv4i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i8_nxv4i8_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma ; CHECK-NEXT: vluxei16.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i8.nxv4i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i8.nxv4i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i8_nxv4i8_nxv4i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i8_nxv4i8_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i8.nxv4i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i8.nxv8i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i8_nxv8i8_nxv8i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i8_nxv8i8_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma ; CHECK-NEXT: vluxei16.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i8.nxv8i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i8.nxv8i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i8_nxv8i8_nxv8i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i8_nxv8i8_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i8.nxv8i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16i8.nxv16i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv16i8_nxv16i8_nxv16i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16i8_nxv16i8_nxv16i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma ; CHECK-NEXT: vluxei16.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16i8.nxv16i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16i8.nxv16i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16i8_nxv16i8_nxv16i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16i8_nxv16i8_nxv16i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16i8.nxv16i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv32i8.nxv32i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv32i8_nxv32i8_nxv32i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv32i8_nxv32i8_nxv32i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma ; CHECK-NEXT: vluxei16.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv32i8.nxv32i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv32i8.nxv32i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv32i8_nxv32i8_nxv32i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv32i8_nxv32i8_nxv32i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv32i8.nxv32i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i16.nxv1i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i16_nxv1i16_nxv1i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i16_nxv1i16_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i16.nxv1i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i16.nxv1i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i16_nxv1i16_nxv1i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i16_nxv1i16_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i16.nxv1i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i16.nxv2i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i16_nxv2i16_nxv2i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i16_nxv2i16_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i16.nxv2i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i16.nxv2i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i16_nxv2i16_nxv2i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i16_nxv2i16_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i16.nxv2i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i16.nxv4i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i16_nxv4i16_nxv4i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i16_nxv4i16_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i16.nxv4i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i16.nxv4i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i16_nxv4i16_nxv4i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i16_nxv4i16_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i16.nxv4i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i16.nxv8i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i16_nxv8i16_nxv8i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i16_nxv8i16_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i16.nxv8i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i16.nxv8i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i16_nxv8i16_nxv8i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i16_nxv8i16_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i16.nxv8i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16i16.nxv16i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv16i16_nxv16i16_nxv16i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16i16_nxv16i16_nxv16i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16i16.nxv16i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16i16.nxv16i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16i16_nxv16i16_nxv16i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16i16_nxv16i16_nxv16i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16i16.nxv16i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv32i16.nxv32i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv32i16_nxv32i16_nxv32i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv32i16_nxv32i16_nxv32i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv32i16.nxv32i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv32i16.nxv32i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv32i16_nxv32i16_nxv32i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv32i16_nxv32i16_nxv32i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv32i16.nxv32i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i32.nxv1i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i32_nxv1i32_nxv1i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i32_nxv1i32_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma ; CHECK-NEXT: vluxei16.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i32.nxv1i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i32.nxv1i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i32_nxv1i32_nxv1i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i32_nxv1i32_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i32.nxv1i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i32.nxv2i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i32_nxv2i32_nxv2i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i32_nxv2i32_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma ; CHECK-NEXT: vluxei16.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i32.nxv2i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i32.nxv2i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i32_nxv2i32_nxv2i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i32_nxv2i32_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i32.nxv2i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i32.nxv4i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i32_nxv4i32_nxv4i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i32_nxv4i32_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma ; CHECK-NEXT: vluxei16.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i32.nxv4i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i32.nxv4i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i32_nxv4i32_nxv4i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i32_nxv4i32_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i32.nxv4i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i32.nxv8i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i32_nxv8i32_nxv8i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i32_nxv8i32_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma ; CHECK-NEXT: vluxei16.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i32.nxv8i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i32.nxv8i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i32_nxv8i32_nxv8i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i32_nxv8i32_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i32.nxv8i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16i32.nxv16i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv16i32_nxv16i32_nxv16i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16i32_nxv16i32_nxv16i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma ; CHECK-NEXT: vluxei16.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16i32.nxv16i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16i32.nxv16i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16i32_nxv16i32_nxv16i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16i32_nxv16i32_nxv16i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16i32.nxv16i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i64.nxv1i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i64_nxv1i64_nxv1i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i64_nxv1i64_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma ; CHECK-NEXT: vluxei16.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i64.nxv1i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i64.nxv1i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i64_nxv1i64_nxv1i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i64_nxv1i64_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i64.nxv1i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i64.nxv2i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i64_nxv2i64_nxv2i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i64_nxv2i64_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma ; CHECK-NEXT: vluxei16.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i64.nxv2i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i64.nxv2i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i64_nxv2i64_nxv2i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i64_nxv2i64_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i64.nxv2i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i64.nxv4i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i64_nxv4i64_nxv4i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i64_nxv4i64_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma ; CHECK-NEXT: vluxei16.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i64.nxv4i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i64.nxv4i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i64_nxv4i64_nxv4i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i64_nxv4i64_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i64.nxv4i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i64.nxv8i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i64_nxv8i64_nxv8i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i64_nxv8i64_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma ; CHECK-NEXT: vluxei16.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i64.nxv8i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i64.nxv8i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i64_nxv8i64_nxv8i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i64_nxv8i64_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i64.nxv8i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1f16.nxv1i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv1f16_nxv1f16_nxv1i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1f16_nxv1f16_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1f16.nxv1i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1f16.nxv1i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1f16_nxv1f16_nxv1i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1f16_nxv1f16_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1f16.nxv1i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2f16.nxv2i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv2f16_nxv2f16_nxv2i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2f16_nxv2f16_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2f16.nxv2i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2f16.nxv2i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2f16_nxv2f16_nxv2i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2f16_nxv2f16_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2f16.nxv2i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4f16.nxv4i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv4f16_nxv4f16_nxv4i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4f16_nxv4f16_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4f16.nxv4i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4f16.nxv4i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4f16_nxv4f16_nxv4i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4f16_nxv4f16_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4f16.nxv4i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8f16.nxv8i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv8f16_nxv8f16_nxv8i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8f16_nxv8f16_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8f16.nxv8i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8f16.nxv8i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8f16_nxv8f16_nxv8i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8f16_nxv8f16_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8f16.nxv8i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16f16.nxv16i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv16f16_nxv16f16_nxv16i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16f16_nxv16f16_nxv16i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16f16.nxv16i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16f16.nxv16i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16f16_nxv16f16_nxv16i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16f16_nxv16f16_nxv16i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16f16.nxv16i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv32f16.nxv32i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv32f16_nxv32f16_nxv32i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv32f16_nxv32f16_nxv32i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma ; CHECK-NEXT: vluxei16.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv32f16.nxv32i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv32f16.nxv32i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv32f16_nxv32f16_nxv32i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv32f16_nxv32f16_nxv32i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv32f16.nxv32i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1f32.nxv1i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv1f32_nxv1f32_nxv1i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1f32_nxv1f32_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma ; CHECK-NEXT: vluxei16.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1f32.nxv1i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1f32.nxv1i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1f32_nxv1f32_nxv1i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1f32_nxv1f32_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1f32.nxv1i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2f32.nxv2i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv2f32_nxv2f32_nxv2i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2f32_nxv2f32_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma ; CHECK-NEXT: vluxei16.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2f32.nxv2i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2f32.nxv2i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2f32_nxv2f32_nxv2i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2f32_nxv2f32_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2f32.nxv2i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4f32.nxv4i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv4f32_nxv4f32_nxv4i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4f32_nxv4f32_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma ; CHECK-NEXT: vluxei16.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4f32.nxv4i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4f32.nxv4i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4f32_nxv4f32_nxv4i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4f32_nxv4f32_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4f32.nxv4i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8f32.nxv8i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv8f32_nxv8f32_nxv8i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8f32_nxv8f32_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma ; CHECK-NEXT: vluxei16.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8f32.nxv8i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8f32.nxv8i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8f32_nxv8f32_nxv8i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8f32_nxv8f32_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8f32.nxv8i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16f32.nxv16i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv16f32_nxv16f32_nxv16i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16f32_nxv16f32_nxv16i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma ; CHECK-NEXT: vluxei16.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16f32.nxv16i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16f32.nxv16i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16f32_nxv16f32_nxv16i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16f32_nxv16f32_nxv16i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16f32.nxv16i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1f64.nxv1i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv1f64_nxv1f64_nxv1i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1f64_nxv1f64_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma ; CHECK-NEXT: vluxei16.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1f64.nxv1i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1f64.nxv1i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1f64_nxv1f64_nxv1i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1f64_nxv1f64_nxv1i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1f64.nxv1i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2f64.nxv2i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv2f64_nxv2f64_nxv2i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2f64_nxv2f64_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma ; CHECK-NEXT: vluxei16.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2f64.nxv2i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2f64.nxv2i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2f64_nxv2f64_nxv2i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2f64_nxv2f64_nxv2i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2f64.nxv2i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4f64.nxv4i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv4f64_nxv4f64_nxv4i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4f64_nxv4f64_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma ; CHECK-NEXT: vluxei16.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4f64.nxv4i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4f64.nxv4i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4f64_nxv4f64_nxv4i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4f64_nxv4f64_nxv4i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4f64.nxv4i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8f64.nxv8i16( , *, , iXLen); define @intrinsic_vluxei_v_nxv8f64_nxv8f64_nxv8i16(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8f64_nxv8f64_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma ; CHECK-NEXT: vluxei16.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8f64.nxv8i16( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8f64.nxv8i16( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8f64_nxv8f64_nxv8i16( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8f64_nxv8f64_nxv8i16: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, mu ; CHECK-NEXT: vluxei16.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8f64.nxv8i16( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i8.nxv1i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i8_nxv1i8_nxv1i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i8_nxv1i8_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma ; CHECK-NEXT: vluxei8.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i8.nxv1i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i8.nxv1i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i8_nxv1i8_nxv1i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i8_nxv1i8_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i8.nxv1i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i8.nxv2i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i8_nxv2i8_nxv2i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i8_nxv2i8_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma ; CHECK-NEXT: vluxei8.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i8.nxv2i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i8.nxv2i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i8_nxv2i8_nxv2i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i8_nxv2i8_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i8.nxv2i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i8.nxv4i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i8_nxv4i8_nxv4i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i8_nxv4i8_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma ; CHECK-NEXT: vluxei8.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i8.nxv4i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i8.nxv4i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i8_nxv4i8_nxv4i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i8_nxv4i8_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i8.nxv4i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i8.nxv8i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i8_nxv8i8_nxv8i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i8_nxv8i8_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma ; CHECK-NEXT: vluxei8.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i8.nxv8i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i8.nxv8i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i8_nxv8i8_nxv8i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i8_nxv8i8_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i8.nxv8i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16i8.nxv16i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv16i8_nxv16i8_nxv16i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16i8_nxv16i8_nxv16i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma ; CHECK-NEXT: vluxei8.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16i8.nxv16i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16i8.nxv16i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16i8_nxv16i8_nxv16i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16i8_nxv16i8_nxv16i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16i8.nxv16i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv32i8.nxv32i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv32i8_nxv32i8_nxv32i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv32i8_nxv32i8_nxv32i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma ; CHECK-NEXT: vluxei8.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv32i8.nxv32i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv32i8.nxv32i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv32i8_nxv32i8_nxv32i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv32i8_nxv32i8_nxv32i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv32i8.nxv32i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv64i8.nxv64i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv64i8_nxv64i8_nxv64i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv64i8_nxv64i8_nxv64i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma ; CHECK-NEXT: vluxei8.v v8, (a0), v8 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv64i8.nxv64i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv64i8.nxv64i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv64i8_nxv64i8_nxv64i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv64i8_nxv64i8_nxv64i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv64i8.nxv64i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i16.nxv1i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i16_nxv1i16_nxv1i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i16_nxv1i16_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i16.nxv1i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i16.nxv1i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i16_nxv1i16_nxv1i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i16_nxv1i16_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i16.nxv1i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i16.nxv2i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i16_nxv2i16_nxv2i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i16_nxv2i16_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i16.nxv2i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i16.nxv2i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i16_nxv2i16_nxv2i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i16_nxv2i16_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i16.nxv2i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i16.nxv4i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i16_nxv4i16_nxv4i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i16_nxv4i16_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i16.nxv4i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i16.nxv4i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i16_nxv4i16_nxv4i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i16_nxv4i16_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i16.nxv4i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i16.nxv8i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i16_nxv8i16_nxv8i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i16_nxv8i16_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma ; CHECK-NEXT: vluxei8.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i16.nxv8i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i16.nxv8i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i16_nxv8i16_nxv8i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i16_nxv8i16_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i16.nxv8i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16i16.nxv16i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv16i16_nxv16i16_nxv16i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16i16_nxv16i16_nxv16i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma ; CHECK-NEXT: vluxei8.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16i16.nxv16i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16i16.nxv16i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16i16_nxv16i16_nxv16i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16i16_nxv16i16_nxv16i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16i16.nxv16i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv32i16.nxv32i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv32i16_nxv32i16_nxv32i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv32i16_nxv32i16_nxv32i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma ; CHECK-NEXT: vluxei8.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv32i16.nxv32i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv32i16.nxv32i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv32i16_nxv32i16_nxv32i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv32i16_nxv32i16_nxv32i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv32i16.nxv32i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i32.nxv1i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i32_nxv1i32_nxv1i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i32_nxv1i32_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i32.nxv1i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i32.nxv1i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i32_nxv1i32_nxv1i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i32_nxv1i32_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i32.nxv1i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i32.nxv2i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i32_nxv2i32_nxv2i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i32_nxv2i32_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i32.nxv2i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i32.nxv2i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i32_nxv2i32_nxv2i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i32_nxv2i32_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i32.nxv2i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i32.nxv4i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i32_nxv4i32_nxv4i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i32_nxv4i32_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma ; CHECK-NEXT: vluxei8.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i32.nxv4i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i32.nxv4i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i32_nxv4i32_nxv4i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i32_nxv4i32_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i32.nxv4i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i32.nxv8i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i32_nxv8i32_nxv8i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i32_nxv8i32_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma ; CHECK-NEXT: vluxei8.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i32.nxv8i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i32.nxv8i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i32_nxv8i32_nxv8i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i32_nxv8i32_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i32.nxv8i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16i32.nxv16i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv16i32_nxv16i32_nxv16i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16i32_nxv16i32_nxv16i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma ; CHECK-NEXT: vluxei8.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16i32.nxv16i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16i32.nxv16i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16i32_nxv16i32_nxv16i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16i32_nxv16i32_nxv16i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16i32.nxv16i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1i64.nxv1i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv1i64_nxv1i64_nxv1i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1i64_nxv1i64_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1i64.nxv1i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1i64.nxv1i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1i64_nxv1i64_nxv1i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1i64_nxv1i64_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1i64.nxv1i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2i64.nxv2i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv2i64_nxv2i64_nxv2i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2i64_nxv2i64_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma ; CHECK-NEXT: vluxei8.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2i64.nxv2i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2i64.nxv2i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2i64_nxv2i64_nxv2i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2i64_nxv2i64_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2i64.nxv2i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4i64.nxv4i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv4i64_nxv4i64_nxv4i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4i64_nxv4i64_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma ; CHECK-NEXT: vluxei8.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4i64.nxv4i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4i64.nxv4i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4i64_nxv4i64_nxv4i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4i64_nxv4i64_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4i64.nxv4i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8i64.nxv8i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv8i64_nxv8i64_nxv8i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8i64_nxv8i64_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma ; CHECK-NEXT: vluxei8.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8i64.nxv8i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8i64.nxv8i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8i64_nxv8i64_nxv8i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8i64_nxv8i64_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8i64.nxv8i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1f16.nxv1i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv1f16_nxv1f16_nxv1i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1f16_nxv1f16_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1f16.nxv1i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1f16.nxv1i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1f16_nxv1f16_nxv1i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1f16_nxv1f16_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1f16.nxv1i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2f16.nxv2i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv2f16_nxv2f16_nxv2i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2f16_nxv2f16_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2f16.nxv2i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2f16.nxv2i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2f16_nxv2f16_nxv2i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2f16_nxv2f16_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2f16.nxv2i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4f16.nxv4i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv4f16_nxv4f16_nxv4i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4f16_nxv4f16_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4f16.nxv4i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4f16.nxv4i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4f16_nxv4f16_nxv4i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4f16_nxv4f16_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4f16.nxv4i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8f16.nxv8i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv8f16_nxv8f16_nxv8i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8f16_nxv8f16_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma ; CHECK-NEXT: vluxei8.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8f16.nxv8i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8f16.nxv8i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8f16_nxv8f16_nxv8i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8f16_nxv8f16_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8f16.nxv8i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16f16.nxv16i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv16f16_nxv16f16_nxv16i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16f16_nxv16f16_nxv16i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma ; CHECK-NEXT: vluxei8.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16f16.nxv16i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16f16.nxv16i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16f16_nxv16f16_nxv16i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16f16_nxv16f16_nxv16i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16f16.nxv16i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv32f16.nxv32i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv32f16_nxv32f16_nxv32i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv32f16_nxv32f16_nxv32i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma ; CHECK-NEXT: vluxei8.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv32f16.nxv32i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv32f16.nxv32i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv32f16_nxv32f16_nxv32i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv32f16_nxv32f16_nxv32i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv32f16.nxv32i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1f32.nxv1i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv1f32_nxv1f32_nxv1i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1f32_nxv1f32_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1f32.nxv1i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1f32.nxv1i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1f32_nxv1f32_nxv1i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1f32_nxv1f32_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1f32.nxv1i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2f32.nxv2i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv2f32_nxv2f32_nxv2i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2f32_nxv2f32_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2f32.nxv2i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2f32.nxv2i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2f32_nxv2f32_nxv2i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2f32_nxv2f32_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2f32.nxv2i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4f32.nxv4i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv4f32_nxv4f32_nxv4i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4f32_nxv4f32_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma ; CHECK-NEXT: vluxei8.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4f32.nxv4i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4f32.nxv4i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4f32_nxv4f32_nxv4i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4f32_nxv4f32_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4f32.nxv4i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8f32.nxv8i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv8f32_nxv8f32_nxv8i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8f32_nxv8f32_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma ; CHECK-NEXT: vluxei8.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8f32.nxv8i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8f32.nxv8i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8f32_nxv8f32_nxv8i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8f32_nxv8f32_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8f32.nxv8i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv16f32.nxv16i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv16f32_nxv16f32_nxv16i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv16f32_nxv16f32_nxv16i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma ; CHECK-NEXT: vluxei8.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv16f32.nxv16i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv16f32.nxv16i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv16f32_nxv16f32_nxv16i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv16f32_nxv16f32_nxv16i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv16f32.nxv16i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv1f64.nxv1i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv1f64_nxv1f64_nxv1i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv1f64_nxv1f64_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma ; CHECK-NEXT: vluxei8.v v9, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v9 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv1f64.nxv1i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv1f64.nxv1i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv1f64_nxv1f64_nxv1i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv1f64_nxv1f64_nxv1i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v9, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv1f64.nxv1i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv2f64.nxv2i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv2f64_nxv2f64_nxv2i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv2f64_nxv2f64_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma ; CHECK-NEXT: vluxei8.v v10, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v10 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv2f64.nxv2i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv2f64.nxv2i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv2f64_nxv2f64_nxv2i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv2f64_nxv2f64_nxv2i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v10, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv2f64.nxv2i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv4f64.nxv4i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv4f64_nxv4f64_nxv4i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv4f64_nxv4f64_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma ; CHECK-NEXT: vluxei8.v v12, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v12 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv4f64.nxv4i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv4f64.nxv4i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv4f64_nxv4f64_nxv4i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv4f64_nxv4f64_nxv4i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v12, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv4f64.nxv4i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a } declare @llvm.riscv.vluxei.nxv8f64.nxv8i8( , *, , iXLen); define @intrinsic_vluxei_v_nxv8f64_nxv8f64_nxv8i8(* %0, %1, iXLen %2) nounwind { ; CHECK-LABEL: intrinsic_vluxei_v_nxv8f64_nxv8f64_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma ; CHECK-NEXT: vluxei8.v v16, (a0), v8 ; CHECK-NEXT: vmv.v.v v8, v16 ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.nxv8f64.nxv8i8( undef, * %0, %1, iXLen %2) ret %a } declare @llvm.riscv.vluxei.mask.nxv8f64.nxv8i8( , *, , , iXLen, iXLen); define @intrinsic_vluxei_mask_v_nxv8f64_nxv8f64_nxv8i8( %0, * %1, %2, %3, iXLen %4) nounwind { ; CHECK-LABEL: intrinsic_vluxei_mask_v_nxv8f64_nxv8f64_nxv8i8: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, mu ; CHECK-NEXT: vluxei8.v v8, (a0), v16, v0.t ; CHECK-NEXT: ret entry: %a = call @llvm.riscv.vluxei.mask.nxv8f64.nxv8i8( %0, * %1, %2, %3, iXLen %4, iXLen 1) ret %a }