; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d \ ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZVFH ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d \ ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZVFH ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=ilp32d \ ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZVFHMIN ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=lp64d \ ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZVFHMIN declare @llvm.vp.merge.nxv1i1(, , , i32) define @vpmerge_nxv1i1( %va, %vb, %m, i32 zeroext %evl) { ; RV32-LABEL: vpmerge_nxv1i1: ; RV32: # %bb.0: ; RV32-NEXT: vsetvli a1, zero, e32, mf2, ta, ma ; RV32-NEXT: vid.v v10 ; RV32-NEXT: vmsltu.vx v10, v10, a0 ; RV32-NEXT: vmand.mm v9, v9, v10 ; RV32-NEXT: vmandn.mm v8, v8, v9 ; RV32-NEXT: vmand.mm v9, v0, v9 ; RV32-NEXT: vmor.mm v0, v9, v8 ; RV32-NEXT: ret ; ; RV64-LABEL: vpmerge_nxv1i1: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli a1, zero, e64, m1, ta, ma ; RV64-NEXT: vid.v v10 ; RV64-NEXT: vmsltu.vx v10, v10, a0 ; RV64-NEXT: vmand.mm v9, v9, v10 ; RV64-NEXT: vmandn.mm v8, v8, v9 ; RV64-NEXT: vmand.mm v9, v0, v9 ; RV64-NEXT: vmor.mm v0, v9, v8 ; RV64-NEXT: ret %v = call @llvm.vp.merge.nxv1i1( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv1i8(, , , i32) define @vpmerge_vv_nxv1i8( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv1i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf8, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv1i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv1i8(i8 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv1i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv1i8( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv1i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf8, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1i8( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv2i8(, , , i32) define @vpmerge_vv_nxv2i8( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv2i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf4, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv2i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv2i8(i8 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv2i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv2i8( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv2i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf4, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2i8( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv3i8(, , , i32) define @vpmerge_vv_nxv3i8( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv3i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv3i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv3i8(i8 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv3i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv3i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv3i8( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv3i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv3i8( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv4i8(, , , i32) define @vpmerge_vv_nxv4i8( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv4i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv4i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv4i8(i8 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv4i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv4i8( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv4i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4i8( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv8i7(, , , i32) define @vpmerge_vv_nxv8i7( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv8i7: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv8i7( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv8i7(i7 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv8i7: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m1, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i7 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8i7( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv8i7( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv8i7: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i7 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8i7( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv8i8(, , , i32) define @vpmerge_vv_nxv8i8( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv8i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv8i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv8i8(i8 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv8i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m1, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv8i8( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv8i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8i8( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv16i8(, , , i32) define @vpmerge_vv_nxv16i8( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv16i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m2, tu, ma ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv16i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv16i8(i8 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv16i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m2, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv16i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv16i8( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv16i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m2, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv16i8( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv32i8(, , , i32) define @vpmerge_vv_nxv32i8( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv32i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m4, tu, ma ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv32i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv32i8(i8 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv32i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m4, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv32i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv32i8( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv32i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m4, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv32i8( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv64i8(, , , i32) define @vpmerge_vv_nxv64i8( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv64i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m8, tu, ma ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv64i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv64i8(i8 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv64i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e8, m8, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv64i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv64i8( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv64i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e8, m8, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv64i8( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv128i8(, , , i32) define @vpmerge_vv_nxv128i8( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv128i8: ; CHECK: # %bb.0: ; CHECK-NEXT: addi sp, sp, -16 ; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: csrr a1, vlenb ; CHECK-NEXT: slli a1, a1, 3 ; CHECK-NEXT: sub sp, sp, a1 ; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb ; CHECK-NEXT: vmv1r.v v1, v0 ; CHECK-NEXT: vmv8r.v v24, v16 ; CHECK-NEXT: addi a1, sp, 16 ; CHECK-NEXT: vs8r.v v8, (a1) # Unknown-size Folded Spill ; CHECK-NEXT: csrr a1, vlenb ; CHECK-NEXT: slli a1, a1, 3 ; CHECK-NEXT: add a4, a0, a1 ; CHECK-NEXT: vl8r.v v16, (a4) ; CHECK-NEXT: vl8r.v v8, (a0) ; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma ; CHECK-NEXT: sub a0, a3, a1 ; CHECK-NEXT: vlm.v v0, (a2) ; CHECK-NEXT: sltu a2, a3, a0 ; CHECK-NEXT: addi a2, a2, -1 ; CHECK-NEXT: and a0, a2, a0 ; CHECK-NEXT: vsetvli zero, a0, e8, m8, tu, ma ; CHECK-NEXT: vmerge.vvm v16, v16, v24, v0 ; CHECK-NEXT: bltu a3, a1, .LBB28_2 ; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: mv a3, a1 ; CHECK-NEXT: .LBB28_2: ; CHECK-NEXT: vsetvli zero, a3, e8, m8, tu, ma ; CHECK-NEXT: vmv1r.v v0, v1 ; CHECK-NEXT: addi a0, sp, 16 ; CHECK-NEXT: vl8r.v v24, (a0) # Unknown-size Folded Reload ; CHECK-NEXT: vmerge.vvm v8, v8, v24, v0 ; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: slli a0, a0, 3 ; CHECK-NEXT: add sp, sp, a0 ; CHECK-NEXT: addi sp, sp, 16 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv128i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv128i8(i8 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv128i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vmv1r.v v24, v0 ; CHECK-NEXT: vsetvli a3, zero, e8, m8, ta, ma ; CHECK-NEXT: vlm.v v0, (a1) ; CHECK-NEXT: csrr a1, vlenb ; CHECK-NEXT: slli a1, a1, 3 ; CHECK-NEXT: sub a3, a2, a1 ; CHECK-NEXT: sltu a4, a2, a3 ; CHECK-NEXT: addi a4, a4, -1 ; CHECK-NEXT: and a3, a4, a3 ; CHECK-NEXT: vsetvli zero, a3, e8, m8, tu, ma ; CHECK-NEXT: vmerge.vxm v16, v16, a0, v0 ; CHECK-NEXT: bltu a2, a1, .LBB29_2 ; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: mv a2, a1 ; CHECK-NEXT: .LBB29_2: ; CHECK-NEXT: vsetvli zero, a2, e8, m8, tu, ma ; CHECK-NEXT: vmv1r.v v0, v24 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv128i8( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv128i8( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv128i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vmv1r.v v24, v0 ; CHECK-NEXT: vsetvli a2, zero, e8, m8, ta, ma ; CHECK-NEXT: vlm.v v0, (a0) ; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: slli a0, a0, 3 ; CHECK-NEXT: sub a2, a1, a0 ; CHECK-NEXT: sltu a3, a1, a2 ; CHECK-NEXT: addi a3, a3, -1 ; CHECK-NEXT: and a2, a3, a2 ; CHECK-NEXT: vsetvli zero, a2, e8, m8, tu, ma ; CHECK-NEXT: vmerge.vim v16, v16, 2, v0 ; CHECK-NEXT: bltu a1, a0, .LBB30_2 ; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: mv a1, a0 ; CHECK-NEXT: .LBB30_2: ; CHECK-NEXT: vsetvli zero, a1, e8, m8, tu, ma ; CHECK-NEXT: vmv1r.v v0, v24 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv128i8( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv1i16(, , , i32) define @vpmerge_vv_nxv1i16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv1i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf4, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv1i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv1i16(i16 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv1i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv1i16( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv1i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf4, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1i16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv2i16(, , , i32) define @vpmerge_vv_nxv2i16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv2i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv2i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv2i16(i16 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv2i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv2i16( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv2i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2i16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv4i16(, , , i32) define @vpmerge_vv_nxv4i16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv4i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m1, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv4i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv4i16(i16 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv4i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m1, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv4i16( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv4i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m1, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4i16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv8i16(, , , i32) define @vpmerge_vv_nxv8i16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv8i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m2, tu, ma ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv8i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv8i16(i16 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv8i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m2, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv8i16( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv8i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m2, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8i16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv16i16(, , , i32) define @vpmerge_vv_nxv16i16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv16i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m4, tu, ma ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv16i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv16i16(i16 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv16i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m4, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv16i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv16i16( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv16i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m4, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv16i16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv32i16(, , , i32) define @vpmerge_vv_nxv32i16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv32i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m8, tu, ma ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv32i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv32i16(i16 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv32i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e16, m8, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv32i16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv32i16( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv32i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m8, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i16 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv32i16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv1i32(, , , i32) define @vpmerge_vv_nxv1i32( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv1i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv1i32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv1i32(i32 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv1i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1i32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv1i32( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv1i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1i32( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv2i32(, , , i32) define @vpmerge_vv_nxv2i32( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv2i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv2i32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv2i32(i32 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv2i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m1, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2i32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv2i32( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv2i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2i32( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv4i32(, , , i32) define @vpmerge_vv_nxv4i32( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv4i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv4i32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv4i32(i32 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv4i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m2, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4i32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv4i32( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv4i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4i32( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv8i32(, , , i32) define @vpmerge_vv_nxv8i32( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv8i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv8i32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv8i32(i32 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv8i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m4, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8i32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv8i32( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv8i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8i32( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv16i32(, , , i32) define @vpmerge_vv_nxv16i32( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv16i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv16i32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv16i32(i32 %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vx_nxv16i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a1, e32, m8, tu, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv16i32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv16i32( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv16i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv16i32( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv1i64(, , , i32) define @vpmerge_vv_nxv1i64( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv1i64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv1i64(i64 %a, %vb, %m, i32 zeroext %evl) { ; RV32-LABEL: vpmerge_vx_nxv1i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli zero, a2, e64, m1, tu, mu ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vpmerge_vx_nxv1i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m1, tu, ma ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1i64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv1i64( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i64 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1i64( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv2i64(, , , i32) define @vpmerge_vv_nxv2i64( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv2i64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv2i64(i64 %a, %vb, %m, i32 zeroext %evl) { ; RV32-LABEL: vpmerge_vx_nxv2i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli zero, a2, e64, m2, tu, mu ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vpmerge_vx_nxv2i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m2, tu, ma ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2i64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv2i64( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i64 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2i64( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv4i64(, , , i32) define @vpmerge_vv_nxv4i64( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv4i64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv4i64(i64 %a, %vb, %m, i32 zeroext %evl) { ; RV32-LABEL: vpmerge_vx_nxv4i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli zero, a2, e64, m4, tu, mu ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vpmerge_vx_nxv4i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m4, tu, ma ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4i64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv4i64( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i64 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4i64( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv8i64(, , , i32) define @vpmerge_vv_nxv8i64( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv8i64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vx_nxv8i64(i64 %a, %vb, %m, i32 zeroext %evl) { ; RV32-LABEL: vpmerge_vx_nxv8i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli zero, a2, e64, m8, tu, mu ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vpmerge_vx_nxv8i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli zero, a1, e64, m8, tu, ma ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 ; RV64-NEXT: ret %elt.head = insertelement poison, i64 %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8i64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vi_nxv8i64( %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vi_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, i64 2, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8i64( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv1f16(, , , i32) define @vpmerge_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv1f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf4, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv1f16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv1f16(half %a, %vb, %m, i32 zeroext %evl) { ; RV32ZVFH-LABEL: vpmerge_vf_nxv1f16: ; RV32ZVFH: # %bb.0: ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, mf4, tu, ma ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV32ZVFH-NEXT: ret ; ; RV64ZVFH-LABEL: vpmerge_vf_nxv1f16: ; RV64ZVFH: # %bb.0: ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, mf4, tu, ma ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV64ZVFH-NEXT: ret ; ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv1f16: ; RV32ZVFHMIN: # %bb.0: ; RV32ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV32ZVFHMIN-NEXT: vsetvli a1, zero, e32, mf2, ta, ma ; RV32ZVFHMIN-NEXT: vfmv.v.f v9, fa5 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, tu, mu ; RV32ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t ; RV32ZVFHMIN-NEXT: ret ; ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv1f16: ; RV64ZVFHMIN: # %bb.0: ; RV64ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV64ZVFHMIN-NEXT: vsetvli a1, zero, e32, mf2, ta, ma ; RV64ZVFHMIN-NEXT: vfmv.v.f v9, fa5 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, tu, mu ; RV64ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t ; RV64ZVFHMIN-NEXT: ret %elt.head = insertelement poison, half %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1f16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv2f16(, , , i32) define @vpmerge_vv_nxv2f16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv2f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv2f16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv2f16(half %a, %vb, %m, i32 zeroext %evl) { ; RV32ZVFH-LABEL: vpmerge_vf_nxv2f16: ; RV32ZVFH: # %bb.0: ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, mf2, tu, ma ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV32ZVFH-NEXT: ret ; ; RV64ZVFH-LABEL: vpmerge_vf_nxv2f16: ; RV64ZVFH: # %bb.0: ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, mf2, tu, ma ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV64ZVFH-NEXT: ret ; ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv2f16: ; RV32ZVFHMIN: # %bb.0: ; RV32ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV32ZVFHMIN-NEXT: vsetvli a1, zero, e32, m1, ta, ma ; RV32ZVFHMIN-NEXT: vfmv.v.f v9, fa5 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, tu, mu ; RV32ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t ; RV32ZVFHMIN-NEXT: ret ; ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv2f16: ; RV64ZVFHMIN: # %bb.0: ; RV64ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV64ZVFHMIN-NEXT: vsetvli a1, zero, e32, m1, ta, ma ; RV64ZVFHMIN-NEXT: vfmv.v.f v9, fa5 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, tu, mu ; RV64ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t ; RV64ZVFHMIN-NEXT: ret %elt.head = insertelement poison, half %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2f16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv4f16(, , , i32) define @vpmerge_vv_nxv4f16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv4f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m1, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv4f16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv4f16(half %a, %vb, %m, i32 zeroext %evl) { ; RV32ZVFH-LABEL: vpmerge_vf_nxv4f16: ; RV32ZVFH: # %bb.0: ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m1, tu, ma ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV32ZVFH-NEXT: ret ; ; RV64ZVFH-LABEL: vpmerge_vf_nxv4f16: ; RV64ZVFH: # %bb.0: ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m1, tu, ma ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV64ZVFH-NEXT: ret ; ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv4f16: ; RV32ZVFHMIN: # %bb.0: ; RV32ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV32ZVFHMIN-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; RV32ZVFHMIN-NEXT: vfmv.v.f v10, fa5 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, tu, mu ; RV32ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t ; RV32ZVFHMIN-NEXT: ret ; ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv4f16: ; RV64ZVFHMIN: # %bb.0: ; RV64ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV64ZVFHMIN-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; RV64ZVFHMIN-NEXT: vfmv.v.f v10, fa5 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, tu, mu ; RV64ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t ; RV64ZVFHMIN-NEXT: ret %elt.head = insertelement poison, half %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4f16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv8f16(, , , i32) define @vpmerge_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv8f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m2, tu, ma ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv8f16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv8f16(half %a, %vb, %m, i32 zeroext %evl) { ; RV32ZVFH-LABEL: vpmerge_vf_nxv8f16: ; RV32ZVFH: # %bb.0: ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m2, tu, ma ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV32ZVFH-NEXT: ret ; ; RV64ZVFH-LABEL: vpmerge_vf_nxv8f16: ; RV64ZVFH: # %bb.0: ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m2, tu, ma ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV64ZVFH-NEXT: ret ; ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv8f16: ; RV32ZVFHMIN: # %bb.0: ; RV32ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV32ZVFHMIN-NEXT: vsetvli a1, zero, e32, m4, ta, ma ; RV32ZVFHMIN-NEXT: vfmv.v.f v12, fa5 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, tu, mu ; RV32ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t ; RV32ZVFHMIN-NEXT: ret ; ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv8f16: ; RV64ZVFHMIN: # %bb.0: ; RV64ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV64ZVFHMIN-NEXT: vsetvli a1, zero, e32, m4, ta, ma ; RV64ZVFHMIN-NEXT: vfmv.v.f v12, fa5 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, tu, mu ; RV64ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t ; RV64ZVFHMIN-NEXT: ret %elt.head = insertelement poison, half %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8f16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv16f16(, , , i32) define @vpmerge_vv_nxv16f16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv16f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m4, tu, ma ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv16f16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv16f16(half %a, %vb, %m, i32 zeroext %evl) { ; RV32ZVFH-LABEL: vpmerge_vf_nxv16f16: ; RV32ZVFH: # %bb.0: ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m4, tu, ma ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV32ZVFH-NEXT: ret ; ; RV64ZVFH-LABEL: vpmerge_vf_nxv16f16: ; RV64ZVFH: # %bb.0: ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m4, tu, ma ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV64ZVFH-NEXT: ret ; ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv16f16: ; RV32ZVFHMIN: # %bb.0: ; RV32ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV32ZVFHMIN-NEXT: vsetvli a1, zero, e32, m8, ta, ma ; RV32ZVFHMIN-NEXT: vfmv.v.f v16, fa5 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, tu, mu ; RV32ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t ; RV32ZVFHMIN-NEXT: ret ; ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv16f16: ; RV64ZVFHMIN: # %bb.0: ; RV64ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV64ZVFHMIN-NEXT: vsetvli a1, zero, e32, m8, ta, ma ; RV64ZVFHMIN-NEXT: vfmv.v.f v16, fa5 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, tu, mu ; RV64ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t ; RV64ZVFHMIN-NEXT: ret %elt.head = insertelement poison, half %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv16f16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv32f16(, , , i32) define @vpmerge_vv_nxv32f16( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv32f16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e16, m8, tu, ma ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv32f16( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv32f16(half %a, %vb, %m, i32 zeroext %evl) { ; RV32ZVFH-LABEL: vpmerge_vf_nxv32f16: ; RV32ZVFH: # %bb.0: ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m8, tu, ma ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV32ZVFH-NEXT: ret ; ; RV64ZVFH-LABEL: vpmerge_vf_nxv32f16: ; RV64ZVFH: # %bb.0: ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m8, tu, ma ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; RV64ZVFH-NEXT: ret ; ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv32f16: ; RV32ZVFHMIN: # %bb.0: ; RV32ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV32ZVFHMIN-NEXT: vsetvli a1, zero, e32, m8, ta, ma ; RV32ZVFHMIN-NEXT: vfmv.v.f v24, fa5 ; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; RV32ZVFHMIN-NEXT: vfncvt.f.f.w v16, v24 ; RV32ZVFHMIN-NEXT: vmv.v.v v20, v16 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, tu, ma ; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v16, v0 ; RV32ZVFHMIN-NEXT: ret ; ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv32f16: ; RV64ZVFHMIN: # %bb.0: ; RV64ZVFHMIN-NEXT: fcvt.s.h fa5, fa0 ; RV64ZVFHMIN-NEXT: vsetvli a1, zero, e32, m8, ta, ma ; RV64ZVFHMIN-NEXT: vfmv.v.f v24, fa5 ; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma ; RV64ZVFHMIN-NEXT: vfncvt.f.f.w v16, v24 ; RV64ZVFHMIN-NEXT: vmv.v.v v20, v16 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, tu, ma ; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v16, v0 ; RV64ZVFHMIN-NEXT: ret %elt.head = insertelement poison, half %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv32f16( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv1f32(, , , i32) define @vpmerge_vv_nxv1f32( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv1f32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv1f32(float %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vf_nxv1f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, float %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1f32( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv2f32(, , , i32) define @vpmerge_vv_nxv2f32( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv2f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv2f32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv2f32(float %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vf_nxv2f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, float %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2f32( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv4f32(, , , i32) define @vpmerge_vv_nxv4f32( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv4f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv4f32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv4f32(float %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vf_nxv4f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, float %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4f32( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv8f32(, , , i32) define @vpmerge_vv_nxv8f32( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv8f32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv8f32(float %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vf_nxv8f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, float %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8f32( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv16f32(, , , i32) define @vpmerge_vv_nxv16f32( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv16f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv16f32( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv16f32(float %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vf_nxv16f32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, float %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv16f32( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv1f64(, , , i32) define @vpmerge_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv1f64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv1f64(double %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vf_nxv1f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, double %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv1f64( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv2f64(, , , i32) define @vpmerge_vv_nxv2f64( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv2f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv2f64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv2f64(double %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vf_nxv2f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, double %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv2f64( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv4f64(, , , i32) define @vpmerge_vv_nxv4f64( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv4f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv4f64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv4f64(double %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vf_nxv4f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, double %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv4f64( %m, %va, %vb, i32 %evl) ret %v } declare @llvm.vp.merge.nxv8f64(, , , i32) define @vpmerge_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vv_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %v = call @llvm.vp.merge.nxv8f64( %m, %va, %vb, i32 %evl) ret %v } define @vpmerge_vf_nxv8f64(double %a, %vb, %m, i32 zeroext %evl) { ; CHECK-LABEL: vpmerge_vf_nxv8f64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 ; CHECK-NEXT: ret %elt.head = insertelement poison, double %a, i32 0 %va = shufflevector %elt.head, poison, zeroinitializer %v = call @llvm.vp.merge.nxv8f64( %m, %va, %vb, i32 %evl) ret %v }