; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \ ; RUN: | FileCheck %s --check-prefixes=CHECK,RV32 ; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \ ; RUN: | FileCheck %s --check-prefixes=CHECK,RV64 define @vmerge_vv_nxv1i8( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv1i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv1i8( %va, i8 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv1i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv1i8( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv1i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv2i8( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv2i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv2i8( %va, i8 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv2i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv2i8( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv2i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv3i8( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv3i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv3i8( %va, i8 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv3i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv3i8( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv3i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv4i8( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv4i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv4i8( %va, i8 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv4i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv4i8( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv4i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv8i8( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv8i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv8i8( %va, i8 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv8i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv8i8( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv8i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv16i8( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv16i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v10, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv16i8( %va, i8 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv16i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e8, m2, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv16i8( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv16i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv32i8( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv32i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v12, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv32i8( %va, i8 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv32i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e8, m4, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv32i8( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv32i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv64i8( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv64i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v16, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv64i8( %va, i8 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv64i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv64i8( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv64i8: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i8 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv1i16( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv1i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv1i16( %va, i16 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv1i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv1i16( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv1i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv2i16( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv2i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv2i16( %va, i16 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv2i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv2i16( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv2i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv4i16( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv4i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv4i16( %va, i16 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv4i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv4i16( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv4i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv8i16( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv8i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v10, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv8i16( %va, i16 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv8i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv8i16( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv8i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv16i16( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv16i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v12, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv16i16( %va, i16 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv16i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e16, m4, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv16i16( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv16i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv32i16( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv32i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v16, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv32i16( %va, i16 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv32i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e16, m8, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv32i16( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv32i16: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i16 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv1i32( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv1i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv1i32( %va, i32 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv1i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv1i32( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv1i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i32 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv2i32( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv2i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv2i32( %va, i32 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv2i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv2i32( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv2i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i32 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv4i32( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv4i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v10, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv4i32( %va, i32 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv4i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv4i32( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv4i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i32 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv8i32( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv8i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v12, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv8i32( %va, i32 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv8i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv8i32( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv8i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i32 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv16i32( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv16i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v16, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv16i32( %va, i32 signext %b, %cond) { ; CHECK-LABEL: vmerge_xv_nxv16i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m8, ta, ma ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv16i32( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv16i32: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i32 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv1i64( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv1i64( %va, i64 %b, %cond) { ; RV32-LABEL: vmerge_xv_nxv1i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m1, ta, mu ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vmerge_xv_nxv1i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli a1, zero, e64, m1, ta, ma ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 ; RV64-NEXT: ret %head = insertelement poison, i64 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv1i64( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i64 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv2i64( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v10, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv2i64( %va, i64 %b, %cond) { ; RV32-LABEL: vmerge_xv_nxv2i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m2, ta, mu ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vmerge_xv_nxv2i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli a1, zero, e64, m2, ta, ma ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 ; RV64-NEXT: ret %head = insertelement poison, i64 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv2i64( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i64 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv4i64( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v12, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv4i64( %va, i64 %b, %cond) { ; RV32-LABEL: vmerge_xv_nxv4i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m4, ta, mu ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vmerge_xv_nxv4i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli a1, zero, e64, m4, ta, ma ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 ; RV64-NEXT: ret %head = insertelement poison, i64 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv4i64( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i64 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_vv_nxv8i64( %va, %vb, %cond) { ; CHECK-LABEL: vmerge_vv_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vmerge.vvm v8, v16, v8, v0 ; CHECK-NEXT: ret %vc = select %cond, %va, %vb ret %vc } define @vmerge_xv_nxv8i64( %va, i64 %b, %cond) { ; RV32-LABEL: vmerge_xv_nxv8i64: ; RV32: # %bb.0: ; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: sw a1, 12(sp) ; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t ; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: ret ; ; RV64-LABEL: vmerge_xv_nxv8i64: ; RV64: # %bb.0: ; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, ma ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 ; RV64-NEXT: ret %head = insertelement poison, i64 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_iv_nxv8i64( %va, %cond) { ; CHECK-LABEL: vmerge_iv_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma ; CHECK-NEXT: vmerge.vim v8, v8, 3, v0 ; CHECK-NEXT: ret %head = insertelement poison, i64 3, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = select %cond, %splat, %va ret %vc } define @vmerge_truelhs_nxv8i64_0( %va, %vb) { ; CHECK-LABEL: vmerge_truelhs_nxv8i64_0: ; CHECK: # %bb.0: ; CHECK-NEXT: ret %mhead = insertelement poison, i1 1, i32 0 %mtrue = shufflevector %mhead, poison, zeroinitializer %vc = select %mtrue, %va, %vb ret %vc } define @vmerge_falselhs_nxv8i64_0( %va, %vb) { ; CHECK-LABEL: vmerge_falselhs_nxv8i64_0: ; CHECK: # %bb.0: ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %vc = select zeroinitializer, %va, %vb ret %vc }