; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s define @vwadd_vv_nxv1i64( %va, %vb) { ; CHECK-LABEL: vwadd_vv_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vwadd.vv v10, v8, v9 ; CHECK-NEXT: vmv1r.v v8, v10 ; CHECK-NEXT: ret %vc = sext %va to %vd = sext %vb to %ve = add %vc, %vd ret %ve } define @vwaddu_vv_nxv1i64( %va, %vb) { ; CHECK-LABEL: vwaddu_vv_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vwaddu.vv v10, v8, v9 ; CHECK-NEXT: vmv1r.v v8, v10 ; CHECK-NEXT: ret %vc = zext %va to %vd = zext %vb to %ve = add %vc, %vd ret %ve } define @vwadd_vx_nxv1i64( %va, i32 %b) { ; CHECK-LABEL: vwadd_vx_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma ; CHECK-NEXT: vwadd.vx v9, v8, a0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = sext %va to %vd = sext %splat to %ve = add %vc, %vd ret %ve } define @vwaddu_vx_nxv1i64( %va, i32 %b) { ; CHECK-LABEL: vwaddu_vx_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma ; CHECK-NEXT: vwaddu.vx v9, v8, a0 ; CHECK-NEXT: vmv1r.v v8, v9 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = zext %va to %vd = zext %splat to %ve = add %vc, %vd ret %ve } define @vwadd_wv_nxv1i64( %va, %vb) { ; CHECK-LABEL: vwadd_wv_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vwadd.wv v8, v8, v9 ; CHECK-NEXT: ret %vc = sext %vb to %vd = add %va, %vc ret %vd } define @vwaddu_wv_nxv1i64( %va, %vb) { ; CHECK-LABEL: vwaddu_wv_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vwaddu.wv v8, v8, v9 ; CHECK-NEXT: ret %vc = zext %vb to %vd = add %va, %vc ret %vd } define @vwadd_wx_nxv1i64( %va, i32 %b) { ; CHECK-LABEL: vwadd_wx_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma ; CHECK-NEXT: vwadd.wx v8, v8, a0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vb = sext %splat to %vc = add %va, %vb ret %vc } define @vwaddu_wx_nxv1i64( %va, i32 %b) { ; CHECK-LABEL: vwaddu_wx_nxv1i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma ; CHECK-NEXT: vwaddu.wx v8, v8, a0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vb = zext %splat to %vc = add %va, %vb ret %vc } define @vwadd_vv_nxv2i64( %va, %vb) { ; CHECK-LABEL: vwadd_vv_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vwadd.vv v10, v8, v9 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %vc = sext %va to %vd = sext %vb to %ve = add %vc, %vd ret %ve } define @vwaddu_vv_nxv2i64( %va, %vb) { ; CHECK-LABEL: vwaddu_vv_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vwaddu.vv v10, v8, v9 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %vc = zext %va to %vd = zext %vb to %ve = add %vc, %vd ret %ve } define @vwadd_vx_nxv2i64( %va, i32 %b) { ; CHECK-LABEL: vwadd_vx_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma ; CHECK-NEXT: vwadd.vx v10, v8, a0 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = sext %va to %vd = sext %splat to %ve = add %vc, %vd ret %ve } define @vwaddu_vx_nxv2i64( %va, i32 %b) { ; CHECK-LABEL: vwaddu_vx_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma ; CHECK-NEXT: vwaddu.vx v10, v8, a0 ; CHECK-NEXT: vmv2r.v v8, v10 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = zext %va to %vd = zext %splat to %ve = add %vc, %vd ret %ve } define @vwadd_wv_nxv2i64( %va, %vb) { ; CHECK-LABEL: vwadd_wv_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vwadd.wv v8, v8, v10 ; CHECK-NEXT: ret %vc = sext %vb to %vd = add %va, %vc ret %vd } define @vwaddu_wv_nxv2i64( %va, %vb) { ; CHECK-LABEL: vwaddu_wv_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vwaddu.wv v8, v8, v10 ; CHECK-NEXT: ret %vc = zext %vb to %vd = add %va, %vc ret %vd } define @vwadd_wx_nxv2i64( %va, i32 %b) { ; CHECK-LABEL: vwadd_wx_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma ; CHECK-NEXT: vwadd.wx v8, v8, a0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vb = sext %splat to %vc = add %va, %vb ret %vc } define @vwaddu_wx_nxv2i64( %va, i32 %b) { ; CHECK-LABEL: vwaddu_wx_nxv2i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma ; CHECK-NEXT: vwaddu.wx v8, v8, a0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vb = zext %splat to %vc = add %va, %vb ret %vc } define @vwadd_vv_nxv4i64( %va, %vb) { ; CHECK-LABEL: vwadd_vv_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vwadd.vv v12, v8, v10 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %vc = sext %va to %vd = sext %vb to %ve = add %vc, %vd ret %ve } define @vwaddu_vv_nxv4i64( %va, %vb) { ; CHECK-LABEL: vwaddu_vv_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vwaddu.vv v12, v8, v10 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %vc = zext %va to %vd = zext %vb to %ve = add %vc, %vd ret %ve } define @vwadd_vx_nxv4i64( %va, i32 %b) { ; CHECK-LABEL: vwadd_vx_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; CHECK-NEXT: vwadd.vx v12, v8, a0 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = sext %va to %vd = sext %splat to %ve = add %vc, %vd ret %ve } define @vwaddu_vx_nxv4i64( %va, i32 %b) { ; CHECK-LABEL: vwaddu_vx_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; CHECK-NEXT: vwaddu.vx v12, v8, a0 ; CHECK-NEXT: vmv4r.v v8, v12 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = zext %va to %vd = zext %splat to %ve = add %vc, %vd ret %ve } define @vwadd_wv_nxv4i64( %va, %vb) { ; CHECK-LABEL: vwadd_wv_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vwadd.wv v8, v8, v12 ; CHECK-NEXT: ret %vc = sext %vb to %vd = add %va, %vc ret %vd } define @vwaddu_wv_nxv4i64( %va, %vb) { ; CHECK-LABEL: vwaddu_wv_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vwaddu.wv v8, v8, v12 ; CHECK-NEXT: ret %vc = zext %vb to %vd = add %va, %vc ret %vd } define @vwadd_wx_nxv4i64( %va, i32 %b) { ; CHECK-LABEL: vwadd_wx_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; CHECK-NEXT: vwadd.wx v8, v8, a0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vb = sext %splat to %vc = add %va, %vb ret %vc } define @vwaddu_wx_nxv4i64( %va, i32 %b) { ; CHECK-LABEL: vwaddu_wx_nxv4i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; CHECK-NEXT: vwaddu.wx v8, v8, a0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vb = zext %splat to %vc = add %va, %vb ret %vc } define @vwadd_vv_nxv8i64( %va, %vb) { ; CHECK-LABEL: vwadd_vv_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vwadd.vv v16, v8, v12 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %vc = sext %va to %vd = sext %vb to %ve = add %vc, %vd ret %ve } define @vwaddu_vv_nxv8i64( %va, %vb) { ; CHECK-LABEL: vwaddu_vv_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vwaddu.vv v16, v8, v12 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %vc = zext %va to %vd = zext %vb to %ve = add %vc, %vd ret %ve } define @vwadd_vx_nxv8i64( %va, i32 %b) { ; CHECK-LABEL: vwadd_vx_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma ; CHECK-NEXT: vwadd.vx v16, v8, a0 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = sext %va to %vd = sext %splat to %ve = add %vc, %vd ret %ve } define @vwaddu_vx_nxv8i64( %va, i32 %b) { ; CHECK-LABEL: vwaddu_vx_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma ; CHECK-NEXT: vwaddu.vx v16, v8, a0 ; CHECK-NEXT: vmv8r.v v8, v16 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vc = zext %va to %vd = zext %splat to %ve = add %vc, %vd ret %ve } define @vwadd_wv_nxv8i64( %va, %vb) { ; CHECK-LABEL: vwadd_wv_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vwadd.wv v8, v8, v16 ; CHECK-NEXT: ret %vc = sext %vb to %vd = add %va, %vc ret %vd } define @vwaddu_wv_nxv8i64( %va, %vb) { ; CHECK-LABEL: vwaddu_wv_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vwaddu.wv v8, v8, v16 ; CHECK-NEXT: ret %vc = zext %vb to %vd = add %va, %vc ret %vd } define @vwadd_wx_nxv8i64( %va, i32 %b) { ; CHECK-LABEL: vwadd_wx_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma ; CHECK-NEXT: vwadd.wx v8, v8, a0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vb = sext %splat to %vc = add %va, %vb ret %vc } define @vwaddu_wx_nxv8i64( %va, i32 %b) { ; CHECK-LABEL: vwaddu_wx_nxv8i64: ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma ; CHECK-NEXT: vwaddu.wx v8, v8, a0 ; CHECK-NEXT: ret %head = insertelement poison, i32 %b, i32 0 %splat = shufflevector %head, poison, zeroinitializer %vb = zext %splat to %vc = add %va, %vb ret %vc }