// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ // RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ // RUN: | llvm-objdump -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN lsrr z0.b, p0/m, z0.b, z0.b // CHECK-INST: lsrr z0.b, p0/m, z0.b, z0.b // CHECK-ENCODING: [0x00,0x80,0x15,0x04] // CHECK-ERROR: instruction requires: sve or sme // CHECK-UNKNOWN: 04158000 lsrr z0.h, p0/m, z0.h, z0.h // CHECK-INST: lsrr z0.h, p0/m, z0.h, z0.h // CHECK-ENCODING: [0x00,0x80,0x55,0x04] // CHECK-ERROR: instruction requires: sve or sme // CHECK-UNKNOWN: 04558000 lsrr z0.s, p0/m, z0.s, z0.s // CHECK-INST: lsrr z0.s, p0/m, z0.s, z0.s // CHECK-ENCODING: [0x00,0x80,0x95,0x04] // CHECK-ERROR: instruction requires: sve or sme // CHECK-UNKNOWN: 04958000 lsrr z0.d, p0/m, z0.d, z0.d // CHECK-INST: lsrr z0.d, p0/m, z0.d, z0.d // CHECK-ENCODING: [0x00,0x80,0xd5,0x04] // CHECK-ERROR: instruction requires: sve or sme // CHECK-UNKNOWN: 04d58000 // --------------------------------------------------------------------------// // Test compatibility with MOVPRFX instruction. movprfx z5.d, p0/z, z7.d // CHECK-INST: movprfx z5.d, p0/z, z7.d // CHECK-ENCODING: [0xe5,0x20,0xd0,0x04] // CHECK-ERROR: instruction requires: sve or sme // CHECK-UNKNOWN: 04d020e5 lsrr z5.d, p0/m, z5.d, z0.d // CHECK-INST: lsrr z5.d, p0/m, z5.d, z0.d // CHECK-ENCODING: [0x05,0x80,0xd5,0x04] // CHECK-ERROR: instruction requires: sve or sme // CHECK-UNKNOWN: 04d58005 movprfx z5, z7 // CHECK-INST: movprfx z5, z7 // CHECK-ENCODING: [0xe5,0xbc,0x20,0x04] // CHECK-ERROR: instruction requires: sve or sme // CHECK-UNKNOWN: 0420bce5 lsrr z5.d, p0/m, z5.d, z0.d // CHECK-INST: lsrr z5.d, p0/m, z5.d, z0.d // CHECK-ENCODING: [0x05,0x80,0xd5,0x04] // CHECK-ERROR: instruction requires: sve or sme // CHECK-UNKNOWN: 04d58005