; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt -S -passes=instcombine < %s | FileCheck %s ; PR2645 ; instcombine shouldn't delete the shufflevector. define internal void @0(ptr %arg, i32 %arg1, ptr %arg2) { ; CHECK-LABEL: @0( ; CHECK-NEXT: bb: ; CHECK-NEXT: br label [[BB3:%.*]] ; CHECK: bb3: ; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 0, [[BB:%.*]] ], [ [[I17:%.*]], [[BB4:%.*]] ] ; CHECK-NEXT: [[I:%.*]] = icmp slt i32 [[DOT0]], [[ARG1:%.*]] ; CHECK-NEXT: br i1 [[I]], label [[BB4]], label [[BB18:%.*]] ; CHECK: bb4: ; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[DOT0]] to i64 ; CHECK-NEXT: [[I5:%.*]] = getelementptr i8, ptr [[ARG2:%.*]], i64 [[TMP0]] ; CHECK-NEXT: [[I71:%.*]] = load <1 x i64>, ptr [[I5]], align 1 ; CHECK-NEXT: [[I9:%.*]] = call <2 x i64> @foo(<1 x i64> [[I71]]) ; CHECK-NEXT: [[I11:%.*]] = bitcast <2 x i64> [[I9]] to <8 x i16> ; CHECK-NEXT: [[I12:%.*]] = shufflevector <8 x i16> [[I11]], <8 x i16> poison, <8 x i32> ; CHECK-NEXT: [[I13:%.*]] = bitcast <8 x i16> [[I12]] to <4 x i32> ; CHECK-NEXT: [[I14:%.*]] = sitofp <4 x i32> [[I13]] to <4 x float> ; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[DOT0]] to i64 ; CHECK-NEXT: [[I15:%.*]] = getelementptr i8, ptr [[ARG:%.*]], i64 [[TMP2]] ; CHECK-NEXT: store <4 x float> [[I14]], ptr [[I15]], align 1 ; CHECK-NEXT: [[I17]] = add i32 [[DOT0]], 1 ; CHECK-NEXT: br label [[BB3]] ; CHECK: bb18: ; CHECK-NEXT: call void @llvm.x86.mmx.emms() ; CHECK-NEXT: ret void ; bb: br label %bb3 bb3: ; preds = %bb4, %bb %.0 = phi i32 [ 0, %bb ], [ %i17, %bb4 ] %i = icmp slt i32 %.0, %arg1 br i1 %i, label %bb4, label %bb18 bb4: ; preds = %bb3 %i5 = getelementptr i8, ptr %arg2, i32 %.0 %i7 = load <4 x i16>, ptr %i5, align 1 %i8 = bitcast <4 x i16> %i7 to <1 x i64> %i9 = call <2 x i64> @foo(<1 x i64> %i8) %i10 = bitcast <2 x i64> %i9 to <4 x i32> %i11 = bitcast <4 x i32> %i10 to <8 x i16> %i12 = shufflevector <8 x i16> %i11, <8 x i16> %i11, <8 x i32> %i13 = bitcast <8 x i16> %i12 to <4 x i32> %i14 = sitofp <4 x i32> %i13 to <4 x float> %i15 = getelementptr i8, ptr %arg, i32 %.0 store <4 x float> %i14, ptr %i15, align 1 %i17 = add i32 %.0, 1 br label %bb3 bb18: ; preds = %bb3 call void @llvm.x86.mmx.emms() ret void } declare <2 x i64> @foo(<1 x i64>) declare void @llvm.x86.mmx.emms() #0 attributes #0 = { nounwind }