; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -S -passes='loop(loop-flatten),verify' -verify-loop-info -verify-dom-info -verify-scev | FileCheck %s ; Check that the mul does not have extra uses. define void @test0(ptr %arg, ptr %arg1) { ; CHECK-LABEL: @test0( ; CHECK-NEXT: bb: ; CHECK-NEXT: br label [[DOTPREHEADER:%.*]] ; CHECK: .preheader: ; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[BB:%.*]] ], [ [[I5:%.*]], [[BB4:%.*]] ] ; CHECK-NEXT: [[I2:%.*]] = mul i64 [[I]], 3 ; CHECK-NEXT: [[I3:%.*]] = getelementptr i16, ptr [[ARG1:%.*]], i64 [[I2]] ; CHECK-NEXT: br label [[BB7:%.*]] ; CHECK: bb4: ; CHECK-NEXT: [[I5]] = add i64 [[I]], 1 ; CHECK-NEXT: [[I6:%.*]] = icmp slt i64 [[I5]], 2 ; CHECK-NEXT: br i1 [[I6]], label [[DOTPREHEADER]], label [[BB14:%.*]] ; CHECK: bb7: ; CHECK-NEXT: [[I8:%.*]] = phi i64 [ 0, [[DOTPREHEADER]] ], [ [[I12:%.*]], [[BB7]] ] ; CHECK-NEXT: [[I9:%.*]] = load i16, ptr [[I3]], align 2 ; CHECK-NEXT: [[I10:%.*]] = add i64 [[I8]], [[I2]] ; CHECK-NEXT: [[I11:%.*]] = getelementptr i16, ptr [[ARG:%.*]], i64 [[I10]] ; CHECK-NEXT: store i16 [[I9]], ptr [[I11]], align 2 ; CHECK-NEXT: [[I12]] = add nuw nsw i64 [[I8]], 1 ; CHECK-NEXT: [[I13:%.*]] = icmp ult i64 [[I12]], 3 ; CHECK-NEXT: br i1 [[I13]], label [[BB7]], label [[BB4]] ; CHECK: bb14: ; CHECK-NEXT: ret void ; bb: br label %.preheader .preheader: ; preds = %bb4, %bb %i = phi i64 [ 0, %bb ], [ %i5, %bb4 ] %i2 = mul i64 %i, 3 %i3 = getelementptr i16, ptr %arg1, i64 %i2 br label %bb7 bb4: ; preds = %bb7 %i5 = add i64 %i, 1 %i6 = icmp slt i64 %i5, 2 br i1 %i6, label %.preheader, label %bb14 bb7: ; preds = %bb7, %.preheader %i8 = phi i64 [ 0, %.preheader ], [ %i12, %bb7 ] %i9 = load i16, ptr %i3, align 2 %i10 = add i64 %i8, %i2 %i11 = getelementptr i16, ptr %arg, i64 %i10 store i16 %i9, ptr %i11, align 2 %i12 = add nuw nsw i64 %i8, 1 %i13 = icmp ult i64 %i12, 3 br i1 %i13, label %bb7, label %bb4 bb14: ; preds = %bb4 ret void }