171 lines
5.5 KiB
YAML
171 lines
5.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx90a -run-pass=legalizer -o - %s | FileCheck -check-prefix=GCN %s
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--- |
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define amdgpu_kernel void @test_workitem_id_x_unpacked() !reqd_work_group_size !0 {
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ret void
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}
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define amdgpu_kernel void @test_workitem_id_y_unpacked() !reqd_work_group_size !0 {
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ret void
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}
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define amdgpu_kernel void @test_workitem_id_z_unpacked() !reqd_work_group_size !0 {
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ret void
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}
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define amdgpu_kernel void @test_workitem_id_x_packed() !reqd_work_group_size !0 {
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ret void
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}
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define amdgpu_kernel void @test_workitem_id_y_packed() !reqd_work_group_size !0 {
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ret void
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}
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define amdgpu_kernel void @test_workitem_id_z_packed() !reqd_work_group_size !0 {
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ret void
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}
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define amdgpu_kernel void @missing_arg_info() "amdgpu-no-workitem-id-x" {
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ret void
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}
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!0 = !{i32 256, i32 8, i32 4}
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...
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---
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name: test_workitem_id_x_unpacked
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machineFunctionInfo:
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argumentInfo:
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workGroupIDX: { reg: '$sgpr2' }
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workItemIDX: { reg: '$vgpr0' }
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workItemIDY: { reg: '$vgpr1' }
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workItemIDZ: { reg: '$vgpr2' }
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body: |
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bb.0:
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; GCN-LABEL: name: test_workitem_id_x_unpacked
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
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; GCN-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; GCN-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s32) = G_ASSERT_ZEXT [[COPY1]], 8
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; GCN-NEXT: S_ENDPGM 0, implicit [[ASSERT_ZEXT]](s32)
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%0:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.x)
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S_ENDPGM 0, implicit %0
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...
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---
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name: test_workitem_id_y_unpacked
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machineFunctionInfo:
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argumentInfo:
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workGroupIDX: { reg: '$sgpr2' }
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workItemIDX: { reg: '$vgpr0' }
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workItemIDY: { reg: '$vgpr1' }
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workItemIDZ: { reg: '$vgpr2' }
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body: |
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bb.0:
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; GCN-LABEL: name: test_workitem_id_y_unpacked
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; GCN: liveins: $vgpr1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1
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; GCN-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; GCN-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s32) = G_ASSERT_ZEXT [[COPY1]], 3
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; GCN-NEXT: S_ENDPGM 0, implicit [[ASSERT_ZEXT]](s32)
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%0:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.y)
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S_ENDPGM 0, implicit %0
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...
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---
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name: test_workitem_id_z_unpacked
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machineFunctionInfo:
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argumentInfo:
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workGroupIDX: { reg: '$sgpr2' }
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workItemIDX: { reg: '$vgpr0' }
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workItemIDY: { reg: '$vgpr1' }
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workItemIDZ: { reg: '$vgpr2' }
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body: |
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bb.0:
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; GCN-LABEL: name: test_workitem_id_z_unpacked
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; GCN: liveins: $vgpr2
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2
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; GCN-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; GCN-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s32) = G_ASSERT_ZEXT [[COPY1]], 2
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; GCN-NEXT: S_ENDPGM 0, implicit [[ASSERT_ZEXT]](s32)
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%0:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.z)
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S_ENDPGM 0, implicit %0
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...
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---
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name: test_workitem_id_x_packed
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machineFunctionInfo:
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argumentInfo:
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workItemIDX: { reg: '$vgpr0', mask: 1023 }
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workItemIDY: { reg: '$vgpr0', mask: 1047552 }
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workItemIDZ: { reg: '$vgpr0', mask: 1072693248 }
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body: |
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bb.0:
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; GCN-LABEL: name: test_workitem_id_x_packed
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
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; GCN-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023
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; GCN-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
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; GCN-NEXT: S_ENDPGM 0, implicit [[AND]](s32)
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%0:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.x)
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S_ENDPGM 0, implicit %0
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...
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---
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name: test_workitem_id_y_packed
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machineFunctionInfo:
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argumentInfo:
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workItemIDX: { reg: '$vgpr0', mask: 1023 }
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workItemIDY: { reg: '$vgpr0', mask: 1047552 }
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workItemIDZ: { reg: '$vgpr0', mask: 1072693248 }
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body: |
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bb.0:
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; GCN-LABEL: name: test_workitem_id_y_packed
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
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; GCN-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 10
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; GCN-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
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; GCN-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023
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; GCN-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LSHR]], [[C1]]
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; GCN-NEXT: S_ENDPGM 0, implicit [[AND]](s32)
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%0:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.y)
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S_ENDPGM 0, implicit %0
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...
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---
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name: test_workitem_id_z_packed
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machineFunctionInfo:
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argumentInfo:
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workItemIDX: { reg: '$vgpr0', mask: 1023 }
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workItemIDY: { reg: '$vgpr0', mask: 1047552 }
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workItemIDZ: { reg: '$vgpr0', mask: 1072693248 }
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body: |
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bb.0:
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; GCN-LABEL: name: test_workitem_id_z_packed
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
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; GCN-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
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; GCN-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
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; GCN-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023
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; GCN-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LSHR]], [[C1]]
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; GCN-NEXT: S_ENDPGM 0, implicit [[AND]](s32)
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%0:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.z)
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S_ENDPGM 0, implicit %0
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...
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---
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name: missing_arg_info
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body: |
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bb.0:
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; GCN-LABEL: name: missing_arg_info
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; GCN: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; GCN-NEXT: S_ENDPGM 0, implicit [[DEF]](s32)
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%0:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.z)
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S_ENDPGM 0, implicit %0
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...
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