60 lines
2 KiB
C++
60 lines
2 KiB
C++
//===-- XtensaMCTargetDesc.h - Xtensa Target Descriptions -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides Xtensa specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H
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#define LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H
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#include "llvm/Support/DataTypes.h"
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#include <memory>
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namespace llvm {
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class MCAsmBackend;
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class MCCodeEmitter;
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class MCContext;
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class MCInstrInfo;
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class MCObjectTargetWriter;
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class MCObjectWriter;
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class MCRegisterInfo;
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class MCSubtargetInfo;
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class MCTargetOptions;
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class StringRef;
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class Target;
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class raw_ostream;
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extern Target TheXtensaTarget;
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MCCodeEmitter *createXtensaMCCodeEmitter(const MCInstrInfo &MCII,
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MCContext &Ctx);
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MCAsmBackend *createXtensaMCAsmBackend(const Target &T,
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const MCSubtargetInfo &STI,
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const MCRegisterInfo &MRI,
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const MCTargetOptions &Options);
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std::unique_ptr<MCObjectTargetWriter>
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createXtensaObjectWriter(uint8_t OSABI, bool IsLittleEndian);
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} // end namespace llvm
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// Defines symbolic names for Xtensa registers.
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// This defines a mapping from register name to register number.
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#define GET_REGINFO_ENUM
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#include "XtensaGenRegisterInfo.inc"
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// Defines symbolic names for the Xtensa instructions.
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#define GET_INSTRINFO_ENUM
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#include "XtensaGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "XtensaGenSubtargetInfo.inc"
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#endif // LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H
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