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add.v2i16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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add.vni16.ll
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2025-02-14 19:21:04 +01:00 |
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add_shl.ll
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2025-02-14 19:21:04 +01:00 |
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addo.ll
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2025-02-14 19:21:04 +01:00 |
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addsubu64.ll
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2025-02-14 19:21:04 +01:00 |
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amdgpu-irtranslator.ll
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2025-02-14 19:21:04 +01:00 |
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amdgpu-prelegalizer-combiner-crash.mir
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2025-02-14 19:21:04 +01:00 |
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andn2.ll
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2025-02-14 19:21:04 +01:00 |
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artifact-combiner-anyext.mir
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2025-02-14 19:21:04 +01:00 |
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artifact-combiner-asserts.ll
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2025-02-14 19:21:04 +01:00 |
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artifact-combiner-build-vector.mir
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2025-02-14 19:21:04 +01:00 |
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artifact-combiner-concat-vectors.mir
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2025-02-14 19:21:04 +01:00 |
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artifact-combiner-cse-leaves-dead-cast.mir
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2025-02-14 19:21:04 +01:00 |
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artifact-combiner-extract.mir
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2025-02-14 19:21:04 +01:00 |
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artifact-combiner-sext.mir
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2025-02-14 19:21:04 +01:00 |
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artifact-combiner-trunc.mir
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artifact-combiner-unmerge-values.mir
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2025-02-14 19:21:04 +01:00 |
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artifact-combiner-zext.mir
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2025-02-14 19:21:04 +01:00 |
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ashr.ll
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2025-02-14 19:21:04 +01:00 |
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assert-align.ll
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2025-02-14 19:21:04 +01:00 |
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atomic_load_local.ll
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2025-02-14 19:21:04 +01:00 |
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atomic_optimizations_mul_one.ll
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2025-02-14 19:21:04 +01:00 |
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atomic_store_local.ll
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2025-02-14 19:21:04 +01:00 |
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atomicrmw_udec_wrap.ll
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2025-02-14 19:21:04 +01:00 |
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atomicrmw_uinc_wrap.ll
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2025-02-14 19:21:04 +01:00 |
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bool-legalization.ll
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2025-02-14 19:21:04 +01:00 |
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br-constant-invalid-sgpr-copy.ll
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2025-02-14 19:21:04 +01:00 |
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bswap.ll
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2025-02-14 19:21:04 +01:00 |
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buffer-atomic-fadd.f32-no-rtn.ll
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2025-02-14 19:21:04 +01:00 |
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buffer-atomic-fadd.f32-rtn.ll
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2025-02-14 19:21:04 +01:00 |
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buffer-atomic-fadd.f64.ll
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2025-02-14 19:21:04 +01:00 |
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buffer-atomic-fadd.v2f16-no-rtn.ll
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2025-02-14 19:21:04 +01:00 |
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buffer-atomic-fadd.v2f16-rtn.ll
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2025-02-14 19:21:04 +01:00 |
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buffer-schedule.ll
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2025-02-14 19:21:04 +01:00 |
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bug-legalization-artifact-combiner-dead-def.ll
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2025-02-14 19:21:04 +01:00 |
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bug-legalization-artifact-combiner-dead-def.mir
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2025-02-14 19:21:04 +01:00 |
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call-outgoing-stack-args.ll
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2025-02-14 19:21:04 +01:00 |
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clamp-fmed3-const-combine.ll
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2025-02-14 19:21:04 +01:00 |
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clamp-minmax-const-combine.ll
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2025-02-14 19:21:04 +01:00 |
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combine-add-nullptr.mir
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2025-02-14 19:21:04 +01:00 |
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combine-add-to-ptradd.mir
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2025-02-14 19:21:04 +01:00 |
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combine-amdgpu-cvt-f32-ubyte.mir
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2025-02-14 19:21:04 +01:00 |
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combine-ashr-narrow.mir
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2025-02-14 19:21:04 +01:00 |
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combine-ext-legalizer.mir
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2025-02-14 19:21:04 +01:00 |
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combine-fabs-fneg.mir
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2025-02-14 19:21:04 +01:00 |
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combine-fcanonicalize.mir
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2025-02-14 19:21:04 +01:00 |
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combine-fma-add-ext-fma.ll
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2025-02-14 19:21:04 +01:00 |
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combine-fma-add-ext-mul.ll
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2025-02-14 19:21:04 +01:00 |
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combine-fma-add-fma-mul.ll
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2025-02-14 19:21:04 +01:00 |
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combine-fma-add-mul-post-legalize.mir
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2025-02-14 19:21:04 +01:00 |
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combine-fma-add-mul-pre-legalize.mir
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2025-02-14 19:21:04 +01:00 |
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combine-fma-add-mul.ll
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2025-02-14 19:21:04 +01:00 |
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combine-fma-sub-ext-mul.ll
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2025-02-14 19:21:04 +01:00 |
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combine-fma-sub-ext-neg-mul.ll
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2025-02-14 19:21:04 +01:00 |
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combine-fma-sub-mul.ll
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2025-02-14 19:21:04 +01:00 |
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combine-fma-sub-neg-mul.ll
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2025-02-14 19:21:04 +01:00 |
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combine-fma-unmerge-values.mir
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2025-02-14 19:21:04 +01:00 |
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combine-fold-binop-into-select.mir
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2025-02-14 19:21:04 +01:00 |
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combine-foldable-fneg.mir
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2025-02-14 19:21:04 +01:00 |
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combine-fsh.mir
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2025-02-14 19:21:04 +01:00 |
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combine-fsub-fneg.mir
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2025-02-14 19:21:04 +01:00 |
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combine-itofp.mir
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2025-02-14 19:21:04 +01:00 |
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combine-lshr-narrow.mir
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2025-02-14 19:21:04 +01:00 |
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combine-or-redundant.mir
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2025-02-14 19:21:04 +01:00 |
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combine-redundant-and.mir
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2025-02-14 19:21:04 +01:00 |
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combine-redundant-neg.mir
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2025-02-14 19:21:04 +01:00 |
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combine-rot.mir
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2025-02-14 19:21:04 +01:00 |
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combine-rsq.ll
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2025-02-14 19:21:04 +01:00 |
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combine-rsq.mir
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2025-02-14 19:21:04 +01:00 |
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combine-sext-inreg.mir
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2025-02-14 19:21:04 +01:00 |
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combine-shift-imm-chain-illegal-types.mir
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2025-02-14 19:21:04 +01:00 |
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combine-shift-imm-chain-shlsat.mir
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2025-02-14 19:21:04 +01:00 |
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combine-shift-imm-chain.ll
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2025-02-14 19:21:04 +01:00 |
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combine-shift-of-shifted-logic-shlsat.mir
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2025-02-14 19:21:04 +01:00 |
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combine-shift-of-shifted-logic.ll
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2025-02-14 19:21:04 +01:00 |
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combine-shl-from-extend-narrow.postlegal.mir
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2025-02-14 19:21:04 +01:00 |
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combine-shl-from-extend-narrow.prelegal.mir
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2025-02-14 19:21:04 +01:00 |
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combine-shl-narrow.mir
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2025-02-14 19:21:04 +01:00 |
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combine-short-clamp.ll
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2025-02-14 19:21:04 +01:00 |
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combine-trunc-shift.mir
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2025-02-14 19:21:04 +01:00 |
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combine-urem-pow-2.mir
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2025-02-14 19:21:04 +01:00 |
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combine-zext-trunc.mir
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2025-02-14 19:21:04 +01:00 |
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combiner-crash.ll
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2025-02-14 19:21:04 +01:00 |
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compute-num-sign-bits-med3.mir
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2025-02-14 19:21:04 +01:00 |
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constant-bus-restriction.ll
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2025-02-14 19:21:04 +01:00 |
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crash-stack-address-O0.ll
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2025-02-14 19:21:04 +01:00 |
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cvt_f32_ubyte.ll
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2025-02-14 19:21:04 +01:00 |
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dereferenceable-declaration.ll
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2025-02-14 19:21:04 +01:00 |
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divergence-divergent-i1-phis-no-lane-mask-merging.ll
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2025-02-14 19:21:04 +01:00 |
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divergence-divergent-i1-phis-no-lane-mask-merging.mir
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2025-02-14 19:21:04 +01:00 |
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divergence-divergent-i1-used-outside-loop.ll
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2025-02-14 19:21:04 +01:00 |
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divergence-divergent-i1-used-outside-loop.mir
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2025-02-14 19:21:04 +01:00 |
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divergence-structurizer.ll
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2025-02-14 19:21:04 +01:00 |
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divergence-structurizer.mir
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2025-02-14 19:21:04 +01:00 |
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divergence-temporal-divergent-i1.ll
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2025-02-14 19:21:04 +01:00 |
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divergence-temporal-divergent-i1.mir
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2025-02-14 19:21:04 +01:00 |
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divergence-temporal-divergent-reg.ll
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2025-02-14 19:21:04 +01:00 |
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divergence-temporal-divergent-reg.mir
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2025-02-14 19:21:04 +01:00 |
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divergent-control-flow.ll
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2025-02-14 19:21:04 +01:00 |
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dropped_debug_info_assert.ll
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2025-02-14 19:21:04 +01:00 |
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dummy-target.ll
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2025-02-14 19:21:04 +01:00 |
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dynamic-alloca-divergent.ll
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2025-02-14 19:21:04 +01:00 |
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dynamic-alloca-uniform.ll
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2025-02-14 19:21:04 +01:00 |
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extractelement-stack-lower.ll
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2025-02-14 19:21:04 +01:00 |
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extractelement.i8.ll
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2025-02-14 19:21:04 +01:00 |
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extractelement.i16.ll
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2025-02-14 19:21:04 +01:00 |
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extractelement.i128.ll
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2025-02-14 19:21:04 +01:00 |
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extractelement.ll
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2025-02-14 19:21:04 +01:00 |
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fdiv.f16.ll
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fdiv.f32.ll
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2025-02-14 19:21:04 +01:00 |
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fdiv.f64.ll
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2025-02-14 19:21:04 +01:00 |
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flat-atomic-fadd.f32.ll
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2025-02-14 19:21:04 +01:00 |
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flat-atomic-fadd.f64.ll
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2025-02-14 19:21:04 +01:00 |
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flat-atomic-fadd.v2f16.ll
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2025-02-14 19:21:04 +01:00 |
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flat-scratch-init.gfx.ll
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2025-02-14 19:21:04 +01:00 |
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flat-scratch-init.ll
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2025-02-14 19:21:04 +01:00 |
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flat-scratch.ll
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2025-02-14 19:21:04 +01:00 |
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floor.f64.ll
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2025-02-14 19:21:04 +01:00 |
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fma.ll
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2025-02-14 19:21:04 +01:00 |
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fmax_legacy.ll
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2025-02-14 19:21:04 +01:00 |
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fmed3-min-max-const-combine.ll
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2025-02-14 19:21:04 +01:00 |
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fmin_legacy.ll
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2025-02-14 19:21:04 +01:00 |
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fmul.v2f16.ll
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2025-02-14 19:21:04 +01:00 |
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fp-atomics-gfx940.ll
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2025-02-14 19:21:04 +01:00 |
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fp64-atomics-gfx90a.ll
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2025-02-14 19:21:04 +01:00 |
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fpow.ll
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2025-02-14 19:21:04 +01:00 |
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frem.ll
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fshl.ll
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fshr.ll
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function-returns.ll
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2025-02-14 19:21:04 +01:00 |
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function-returns.v2i65.ll
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2025-02-14 19:21:04 +01:00 |
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global-atomic-fadd.f32-no-rtn.ll
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2025-02-14 19:21:04 +01:00 |
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global-atomic-fadd.f32-rtn.ll
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2025-02-14 19:21:04 +01:00 |
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global-atomic-fadd.f64.ll
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2025-02-14 19:21:04 +01:00 |
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global-atomic-fadd.v2f16-no-rtn.ll
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2025-02-14 19:21:04 +01:00 |
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global-atomic-fadd.v2f16-rtn.ll
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2025-02-14 19:21:04 +01:00 |
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global-value.illegal.ll
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2025-02-14 19:21:04 +01:00 |
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global-value.ll
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hip.extern.shared.array.ll
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2025-02-14 19:21:04 +01:00 |
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i1-copy.ll
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2025-02-14 19:21:04 +01:00 |
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image-waterfall-loop-O0.ll
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2025-02-14 19:21:04 +01:00 |
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implicit-kernarg-backend-usage-global-isel.ll
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2025-02-14 19:21:04 +01:00 |
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inline-asm-mismatched-size.ll
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inline-asm.ll
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insertelement-stack-lower.ll
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2025-02-14 19:21:04 +01:00 |
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insertelement.i8.ll
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insertelement.i16.ll
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insertelement.large.ll
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insertelement.ll
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inst-select-abs.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-add.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-add.s16.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.class.mir
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inst-select-amdgcn.class.s16.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.cos.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.cos.s16.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.cvt.pk.i16.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.cvt.pk.u16.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.cvt.pknorm.i16.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.cvt.pknorm.u16.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.cvt.pkrtz.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.ds.swizzle.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.exp.compr.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.exp.mir
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2025-02-14 19:21:04 +01:00 |
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inst-select-amdgcn.fcmp.constants.w32.mir
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llvm.abs.ll
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llvm.amdgcn.ballot.i32.ll
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llvm.amdgcn.ballot.i64.ll
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llvm.amdgcn.dispatch.id.ll
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llvm.amdgcn.dispatch.ptr.ll
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llvm.amdgcn.div.fmas.ll
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llvm.amdgcn.div.scale.ll
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llvm.amdgcn.ds.fadd.ll
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llvm.amdgcn.ds.fmax.ll
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llvm.amdgcn.ds.fmin.ll
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llvm.amdgcn.end.cf.i32.ll
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llvm.amdgcn.end.cf.i64.ll
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llvm.amdgcn.fdot2.ll
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llvm.amdgcn.fmul.legacy.ll
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llvm.amdgcn.global.atomic.csub.ll
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llvm.amdgcn.global.atomic.fadd-with-ret.ll
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llvm.amdgcn.global.atomic.fadd.ll
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llvm.amdgcn.if.break.i32.ll
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llvm.amdgcn.if.break.i64.ll
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llvm.amdgcn.image.atomic.dim.a16.ll
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llvm.amdgcn.image.atomic.dim.ll
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llvm.amdgcn.image.atomic.dim.mir
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llvm.amdgcn.image.gather4.a16.dim.ll
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llvm.amdgcn.image.gather4.dim.ll
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llvm.amdgcn.image.gather4.o.dim.ll
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llvm.amdgcn.image.getresinfo.a16.ll
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llvm.amdgcn.image.getresinfo.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.image.load.1d.d16.ll
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llvm.amdgcn.image.load.1d.ll
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llvm.amdgcn.image.load.2d.ll
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llvm.amdgcn.image.load.2darraymsaa.a16.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.image.load.2darraymsaa.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.image.load.3d.a16.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.image.load.3d.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.image.sample.cd.g16.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.image.sample.g16.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.image.store.2d.d16.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.image.store.2d.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.implicit.ptr.buffer.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.interp.inreg.ll
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llvm.amdgcn.interp.p1.f16.ll
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llvm.amdgcn.intersect_ray.ll
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llvm.amdgcn.is.private.ll
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llvm.amdgcn.is.shared.ll
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llvm.amdgcn.kernarg.segment.ptr.ll
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llvm.amdgcn.make.buffer.rsrc.ll
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llvm.amdgcn.mfma.gfx90a.ll
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llvm.amdgcn.mov.dpp.ll
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llvm.amdgcn.queue.ptr.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.buffer.atomic.add.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.buffer.atomic.fadd.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.buffer.load.format.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.buffer.load.format.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.buffer.load.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.buffer.store.format.f16.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.buffer.store.format.f32.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.buffer.store.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.buffer.load.format.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.buffer.load.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.buffer.store.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.tbuffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.ptr.tbuffer.store.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.tbuffer.load.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.tbuffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.tbuffer.store.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.tbuffer.store.i8.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.raw.tbuffer.store.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.rsq.clamp.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.s.buffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.s.setreg.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.s.sleep.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.sbfe.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.sdot2.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.sdot4.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.sdot8.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.set.inactive.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.softwqm.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.buffer.atomic.add.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.buffer.atomic.fadd.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.buffer.load.format.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.buffer.load.format.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.buffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.buffer.store.format.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.buffer.store.format.f32.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.buffer.store.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.buffer.load.format.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.buffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.buffer.store.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.ptr.tbuffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.tbuffer.load.f16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.struct.tbuffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.sudot4.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.sudot8.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.trig.preop.ll
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.ubfe.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.udot2.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.udot4.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.udot8.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.update.dpp.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.wmma_32.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.wmma_64.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.workgroup.id.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.workitem.id.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.wqm.demote.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.wqm.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.writelane.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.amdgcn.wwm.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.memcpy.inline.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.memcpy.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.memmove.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.memset.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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llvm.powi.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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load-constant.96.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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load-constant32bit.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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load-local.96.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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load-local.128.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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load-unaligned.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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localizer-wrong-insert-point.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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localizer.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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lshr.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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memory-legalizer-atomic-fence.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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merge-buffer-stores.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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minmaxabs.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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mubuf-global.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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mul-known-bits.i64.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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mul-known-bits.i64.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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mul.ll
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Embed LLVM 18.1.8
|
2025-02-14 19:21:04 +01:00 |
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mul.v2i16.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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no-cse-nonlocal-convergent-instrs.mir
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Embed LLVM 18.1.8
|
2025-02-14 19:21:04 +01:00 |
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no-legalize-atomic.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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non-entry-alloca.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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orn2.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizer-combiner-buildvector-identities.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizer-combiner-divrem.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizer-combiner-fcanonicalize.mir
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Embed LLVM 18.1.8
|
2025-02-14 19:21:04 +01:00 |
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postlegalizer-combiner-freeze.mir
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Embed LLVM 18.1.8
|
2025-02-14 19:21:04 +01:00 |
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postlegalizer-combiner-reassoc.mir
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Embed LLVM 18.1.8
|
2025-02-14 19:21:04 +01:00 |
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postlegalizer-combiner-sextload-from-sextinreg.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizer-combiner-trunc-bitcast-buildvector.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizer-combiner-unmerge-undef.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizer-combiner-zextload-from-and.mir
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Embed LLVM 18.1.8
|
2025-02-14 19:21:04 +01:00 |
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postlegalizercombiner-and.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizercombiner-ashr.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizercombiner-load-and-mask.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizercombiner-lshr.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizercombiner-mul.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizercombiner-sbfx.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizercombiner-select.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizercombiner-shl.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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postlegalizercombiner-ubfx.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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prelegalizer-combiner-divrem.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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prelegalizer-combiner-fptrunc_fpext.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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prelegalizer-combiner-redundant-bitcast.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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prelegalizer-combiner-sext_inreg-to-and.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankcombiner-clamp-fmed3-const.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankcombiner-clamp-minmax-const.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankcombiner-fmed3-minmax-const.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankcombiner-smed3.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankcombiner-umed3.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-abs.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-add.s16.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-add.s32.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-add.v2s16.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn-exp-compr.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn-exp.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn-s-buffer-load.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ballot.i64.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.class.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.cvt.pkrtz.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.div.fmas.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.div.scale.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ds.append.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ds.bpermute.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ds.consume.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ds.gws.init.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ds.gws.sema.v.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ds.ordered.add.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ds.ordered.swap.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ds.permute.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ds.swizzle.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.else.32.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.else.64.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.fcmp.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.fmul.legacy.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.groupstaticsize.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.icmp.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.image.load.1d.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.image.sample.1d.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.interp.mov.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.interp.p1.f16.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.interp.p1.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.interp.p2.f16.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.interp.p2.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.kernarg.segment.ptr.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.kill.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.lds.direct.load.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.lds.param.load.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.live.mask.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.mfma.gfx90a.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.mfma.gfx940.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.mfma.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.ps.live.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.raw.buffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.raw.ptr.buffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.readfirstlane.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.readlane.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.s.buffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.s.buffer.load.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.s.get.waveid.in.workgroup.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.s.getpc.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.s.getreg.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.s.memrealtime.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.s.memtime.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.s.sendmsg.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.s.sendmsghalt.mir
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.struct.buffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.struct.buffer.store.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.struct.ptr.buffer.load.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.struct.ptr.buffer.store.ll
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Embed LLVM 18.1.8
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2025-02-14 19:21:04 +01:00 |
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regbankselect-amdgcn.update.dpp.mir
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Embed LLVM 18.1.8
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regbankselect-amdgcn.wqm.demote.mir
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regbankselect-amdgcn.wqm.mir
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regbankselect-amdgcn.wqm.vote.mir
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regbankselect-amdgcn.writelane.mir
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regbankselect-amdgcn.wwm.mir
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regbankselect-amdgpu-ffbh-u32.mir
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regbankselect-amdgpu-ffbl-b32.mir
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regbankselect-and-s1.mir
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regbankselect-and.mir
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regbankselect-assert-align.mir
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regbankselect-assert-zext.mir
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regbankselect-atomic-cmpxchg.mir
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regbankselect-atomicrmw-fadd.mir
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regbankselect-atomicrmw-max.mir
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regbankselect-atomicrmw-xor.mir
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regbankselect-bitcast.mir
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regbankselect-bitreverse.mir
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regbankselect-block-addr.mir
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regbankselect-brcond.mir
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regbankselect-build-vector.mir
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regbankselect-concat-vector.mir
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regbankselect-constant.mir
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regbankselect-copy.mir
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regbankselect-ctlz-zero-undef.mir
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regbankselect-ctpop.mir
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regbankselect-cttz-zero-undef.mir
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regbankselect-default.mir
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regbankselect-dyn-stackalloc.mir
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regbankselect-extract-vector-elt.mir
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regbankselect-extract.mir
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regbankselect-fabs.mir
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regbankselect-fadd.mir
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regbankselect-fcanonicalize.mir
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regbankselect-fceil.mir
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regbankselect-fcmp.mir
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regbankselect-fexp2.mir
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regbankselect-flog2.mir
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regbankselect-fma.mir
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regbankselect-fmul.mir
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regbankselect-fneg.mir
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regbankselect-fpext.mir
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regbankselect-fptoui.mir
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regbankselect-fptrunc.mir
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regbankselect-frame-index.mir
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regbankselect-freeze.mir
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regbankselect-fshr.mir
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regbankselect-fsqrt.mir
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regbankselect-fsub.mir
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regbankselect-icmp.s16.mir
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regbankselect-illegal-copy.mir
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regbankselect-implicit-def.mir
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regbankselect-insert-vector-elt.mir
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regbankselect-insert.mir
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regbankselect-intrinsic-trunc.mir
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regbankselect-inttoptr.mir
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regbankselect-load.mir
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regbankselect-mad_64_32.mir
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regbankselect-merge-values.mir
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regbankselect-mul.mir
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regbankselect-or.mir
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regbankselect-phi-s1.mir
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regbankselect-phi.mir
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regbankselect-pseudo-scalar-transcendental.mir
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regbankselect-ptr-add.mir
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regbankselect-ptrmask.mir
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regbankselect-ptrtoint.mir
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regbankselect-reg-sequence.mir
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regbankselect-sadde.mir
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regbankselect-salu-float.mir
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regbankselect-sbfx.mir
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regbankselect-select.mir
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regbankselect-sext-inreg.mir
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regbankselect-sext.mir
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regbankselect-sextload.mir
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regbankselect-shl.mir
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regbankselect-sitofp.mir
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regbankselect-smax.mir
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regbankselect-smin.mir
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regbankselect-smulh.mir
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regbankselect-split-scalar-load-metadata.mir
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regbankselect-ssube.mir
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regbankselect-sub.mir
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regbankselect-trunc.mir
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regbankselect-uadde.mir
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regbankselect-uaddo.mir
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regbankselect-ubfx.mir
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regbankselect-uitofp.mir
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regbankselect-umax.mir
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regbankselect-umin.mir
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regbankselect-umulh.mir
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regbankselect-uniform-load-noclobber.mir
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regbankselect-unmerge-values.mir
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regbankselect-usube.mir
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regbankselect-usubo.mir
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regbankselect-waterfall-agpr.mir
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regbankselect-widen-scalar-loads.mir
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regbankselect-xor.mir
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regbankselect-zext.mir
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regbankselect-zextload.mir
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regbankselect.mir
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saddsat.ll
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sbfx.ll
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sdiv.i32.ll
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sdiv.i64.ll
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sdivrem.ll
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select-to-fmin-fmax.ll
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sext_inreg.ll
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shader-epilogs.ll
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shl-ext-reduce.ll
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shl.ll
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shlN_add.ll
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smed3.ll
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smrd.ll
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srem.i32.ll
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srem.i64.ll
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ssubsat.ll
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store-local.96.ll
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store-local.128.ll
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strict_fma.f16.ll
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strict_fma.f32.ll
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strict_fma.f64.ll
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sub.v2i16.ll
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subo.ll
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trunc.ll
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uaddsat.ll
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ubfx.ll
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udiv.i32.ll
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udiv.i64.ll
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udivrem.ll
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umed3.ll
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unsupported-load.ll
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unsupported-ptr-add.ll
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urem.i32.ll
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urem.i64.ll
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usubsat.ll
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v_bfe_i32.ll
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widen-i8-i16-scalar-loads.ll
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wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
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wmma-gfx12-w32-imm.ll
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wmma-gfx12-w32-iu-modifiers.ll
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wmma-gfx12-w32-swmmac-index_key.ll
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wmma-gfx12-w32.ll
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wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
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wmma-gfx12-w64-imm.ll
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wmma-gfx12-w64-iu-modifiers.ll
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wmma-gfx12-w64-swmmac-index_key.ll
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wmma-gfx12-w64.ll
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xnor.ll
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zextload.ll
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