53 lines
2.3 KiB
ArmAsm
53 lines
2.3 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 2>&1 < %s | FileCheck %s
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// --------------------------------------------------------------------------//
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// Out of range index offset
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bfadd za.h[w8, 8], {z20.h-z21.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
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// CHECK-NEXT: bfadd za.h[w8, 8], {z20.h-z21.h}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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bfadd za.h[w8, -1, vgx4], {z0.h-z3.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
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// CHECK-NEXT: bfadd za.h[w8, -1, vgx4], {z0.h-z3.h}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid vector select register
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bfadd za.h[w7, 0], {z20.h-z21.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
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// CHECK-NEXT: bfadd za.h[w7, 0], {z20.h-z21.h}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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bfadd za.h[w12, 0, vgx4], {z20.h-z23.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
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// CHECK-NEXT: bfadd za.h[w12, 0, vgx4], {z20.h-z23.h}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid vector list
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bfadd za.h[w8, 3], {z20.h-z22.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: bfadd za.h[w8, 3], {z20.h-z22.h}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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bfadd za.h[w8, 3, vgx4], {z21.h-z24.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types
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// CHECK-NEXT: bfadd za.h[w8, 3, vgx4], {z21.h-z24.h}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid suffixes
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bfadd za.h[w8, 3, vgx4], {z20.s-z23.s}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: bfadd za.h[w8, 3, vgx4], {z20.s-z23.s}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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bfadd za.d[w8, 3, vgx4], {z20.h-z23.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .h
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// CHECK-NEXT: bfadd za.d[w8, 3, vgx4], {z20.h-z23.h}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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