bolt/deps/llvm-18.1.8/llvm/test/MC/Disassembler/RISCV/fuzzer-invalid.txt
2025-02-14 19:21:04 +01:00

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# RUN: not llvm-mc -disassemble -triple=riscv32 < %s 2>&1 | FileCheck %s
# RUN: not llvm-mc -disassemble -triple=riscv64 < %s 2>&1 | FileCheck %s
#
# Test generated by a LLVM MC Disassembler Protocol Buffer Fuzzer
# for the RISC-V assembly language.
[0xf9 0x95 0xab 0x99]
# CHECK: warning: invalid instruction encoding