38 lines
1.5 KiB
ArmAsm
38 lines
1.5 KiB
ArmAsm
# RUN: llvm-mc %s -triple=riscv64 -mattr=+h -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -mattr=+h -triple riscv64 < %s \
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# RUN: | llvm-objdump --mattr=+h -M no-aliases -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: not llvm-mc -triple riscv32 -mattr=+h < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=CHECK-RV32 %s
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# CHECK-INST: hlv.wu a0, (a1)
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# CHECK: encoding: [0x73,0xc5,0x15,0x68]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
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hlv.wu a0, (a1)
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# CHECK-INST: hlv.wu a0, (a1)
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# CHECK: encoding: [0x73,0xc5,0x15,0x68]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
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hlv.wu a0, 0(a1)
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# CHECK-INST: hlv.d a0, (a1)
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# CHECK: encoding: [0x73,0xc5,0x05,0x6c]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
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hlv.d a0, (a1)
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# CHECK-INST: hlv.d a0, (a1)
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# CHECK: encoding: [0x73,0xc5,0x05,0x6c]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
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hlv.d a0, 0(a1)
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# CHECK-INST: hsv.d a0, (a1)
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# CHECK: encoding: [0x73,0xc0,0xa5,0x6e]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
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hsv.d a0, (a1)
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# CHECK-INST: hsv.d a0, (a1)
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# CHECK: encoding: [0x73,0xc0,0xa5,0x6e]
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# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
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hsv.d a0, 0(a1)
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