bolt/deps/llvm-18.1.8/llvm/test/MC/X86/AMX/x86-64-amx-bf16-intel.s
2025-02-14 19:21:04 +01:00

33 lines
1.1 KiB
ArmAsm

// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
// CHECK: tdpbf16ps tmm6, tmm5, tmm4
// CHECK: encoding: [0xc4,0xe2,0x5a,0x5c,0xf5]
tdpbf16ps tmm6, tmm5, tmm4
// CHECK: tdpbf16ps tmm3, tmm2, tmm1
// CHECK: encoding: [0xc4,0xe2,0x72,0x5c,0xda]
tdpbf16ps tmm3, tmm2, tmm1
// CHECK: tdpbf16ps tmm6, tmm5, tmm4
// CHECK: encoding: [0xc4,0xe2,0x5a,0x5c,0xf5]
tdpbf16ps tmm6, tmm5, tmm4
// CHECK: tdpbf16ps tmm3, tmm2, tmm1
// CHECK: encoding: [0xc4,0xe2,0x72,0x5c,0xda]
tdpbf16ps tmm3, tmm2, tmm1
// CHECK: tdpbf16ps tmm6, tmm5, tmm4
// CHECK: encoding: [0xc4,0xe2,0x5a,0x5c,0xf5]
tdpbf16ps tmm6, tmm5, tmm4
// CHECK: tdpbf16ps tmm3, tmm2, tmm1
// CHECK: encoding: [0xc4,0xe2,0x72,0x5c,0xda]
tdpbf16ps tmm3, tmm2, tmm1
// CHECK: tdpbf16ps tmm6, tmm5, tmm4
// CHECK: encoding: [0xc4,0xe2,0x5a,0x5c,0xf5]
tdpbf16ps tmm6, tmm5, tmm4
// CHECK: tdpbf16ps tmm3, tmm2, tmm1
// CHECK: encoding: [0xc4,0xe2,0x72,0x5c,0xda]
tdpbf16ps tmm3, tmm2, tmm1