291 lines
9.4 KiB
LLVM
291 lines
9.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -S -passes=constraint-elimination < %s | FileCheck %s
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declare void @use(i1)
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define void @signed_iv_step_1(i64 %end) {
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; CHECK-LABEL: define void @signed_iv_step_1(
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; CHECK-SAME: i64 [[END:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[PRECOND:%.*]] = icmp sge i64 [[END]], -10
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; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ -10, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
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; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: call void @use(i1 true)
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; CHECK-NEXT: call void @use(i1 true)
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; CHECK-NEXT: br label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%precond = icmp sge i64 %end, -10
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br i1 %precond, label %loop, label %exit
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loop:
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%iv = phi i64 [ %iv.next, %loop.latch ], [ -10, %entry ]
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%iv.next = add i64 %iv, 1
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%cmp.i.not = icmp eq i64 %iv, %end
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br i1 %cmp.i.not, label %exit, label %loop.latch
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loop.latch:
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%cmp2 = icmp slt i64 %iv, %end
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call void @use(i1 %cmp2)
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%cmp3 = icmp sge i64 %iv, -10
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call void @use(i1 %cmp3)
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br label %loop
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exit:
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ret void
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}
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define void @signed_iv_step_4(i64 %count) {
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; CHECK-LABEL: define void @signed_iv_step_4(
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; CHECK-SAME: i64 [[COUNT:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[END:%.*]] = shl nsw i64 [[COUNT]], 2
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; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i64 [[COUNT]], -1
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; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4
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; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
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; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: call void @use(i1 true)
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; CHECK-NEXT: call void @use(i1 true)
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; CHECK-NEXT: br label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%end = shl nsw i64 %count, 2
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%precond = icmp sgt i64 %count, -1
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br i1 %precond, label %loop, label %exit
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loop:
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%iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ]
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%iv.next = add i64 %iv, 4
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%cmp.i.not = icmp eq i64 %iv, %end
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br i1 %cmp.i.not, label %exit, label %loop.latch
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loop.latch:
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%cmp2 = icmp slt i64 %iv, %end
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call void @use(i1 %cmp2)
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%cmp3 = icmp sge i64 %iv, 0
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call void @use(i1 %cmp3)
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br label %loop
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exit:
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ret void
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}
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define void @signed_iv_step_4_missing_precond(i64 %count) {
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; CHECK-LABEL: define void @signed_iv_step_4_missing_precond(
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; CHECK-SAME: i64 [[COUNT:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[END:%.*]] = shl i64 [[COUNT]], 2
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; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i64 [[COUNT]], -1
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; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4
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; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
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; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i64 [[IV]], [[END]]
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; CHECK-NEXT: call void @use(i1 [[CMP2]])
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; CHECK-NEXT: [[CMP3:%.*]] = icmp sge i64 [[IV]], 0
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; CHECK-NEXT: call void @use(i1 [[CMP3]])
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; CHECK-NEXT: br label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%end = shl i64 %count, 2
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%precond = icmp sgt i64 %count, -1
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br i1 %precond, label %loop, label %exit
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loop:
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%iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ]
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%iv.next = add i64 %iv, 4
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%cmp.i.not = icmp eq i64 %iv, %end
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br i1 %cmp.i.not, label %exit, label %loop.latch
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loop.latch:
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%cmp2 = icmp slt i64 %iv, %end
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call void @use(i1 %cmp2)
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%cmp3 = icmp sge i64 %iv, 0
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call void @use(i1 %cmp3)
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br label %loop
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exit:
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ret void
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}
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define void @signed_iv_step_4_start_4(i64 %count) {
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; CHECK-LABEL: define void @signed_iv_step_4_start_4(
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; CHECK-SAME: i64 [[COUNT:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[END:%.*]] = shl nsw i64 [[COUNT]], 2
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; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i64 [[COUNT]], 0
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; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 4, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4
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; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
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; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: call void @use(i1 true)
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; CHECK-NEXT: call void @use(i1 true)
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; CHECK-NEXT: br label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%end = shl nsw i64 %count, 2
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%precond = icmp sgt i64 %count, 0
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br i1 %precond, label %loop, label %exit
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loop:
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%iv = phi i64 [ %iv.next, %loop.latch ], [ 4, %entry ]
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%iv.next = add i64 %iv, 4
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%cmp.i.not = icmp eq i64 %iv, %end
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br i1 %cmp.i.not, label %exit, label %loop.latch
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loop.latch:
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%cmp2 = icmp slt i64 %iv, %end
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call void @use(i1 %cmp2)
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%cmp3 = icmp sge i64 %iv, 4
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call void @use(i1 %cmp3)
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br label %loop
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exit:
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ret void
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}
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define void @signed_iv_step_4_start_4_missing_precond(i64 %count) {
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; CHECK-LABEL: define void @signed_iv_step_4_start_4_missing_precond(
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; CHECK-SAME: i64 [[COUNT:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[END:%.*]] = shl nsw i64 [[COUNT]], 2
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; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i64 [[COUNT]], -1
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; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 4, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4
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; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
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; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i64 [[IV]], [[END]]
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; CHECK-NEXT: call void @use(i1 [[CMP2]])
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; CHECK-NEXT: [[CMP3:%.*]] = icmp sge i64 [[IV]], 4
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; CHECK-NEXT: call void @use(i1 [[CMP3]])
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; CHECK-NEXT: br label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%end = shl nsw i64 %count, 2
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%precond = icmp sgt i64 %count, -1
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br i1 %precond, label %loop, label %exit
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loop:
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%iv = phi i64 [ %iv.next, %loop.latch ], [ 4, %entry ]
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%iv.next = add i64 %iv, 4
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%cmp.i.not = icmp eq i64 %iv, %end
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br i1 %cmp.i.not, label %exit, label %loop.latch
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loop.latch:
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%cmp2 = icmp slt i64 %iv, %end
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call void @use(i1 %cmp2)
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%cmp3 = icmp sge i64 %iv, 4
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call void @use(i1 %cmp3)
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br label %loop
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exit:
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ret void
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}
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define void @signed_iv_step_minus1(i64 %end) {
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; CHECK-LABEL: define void @signed_iv_step_minus1(
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; CHECK-SAME: i64 [[END:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[PRECOND:%.*]] = icmp sle i64 [[END]], 10
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; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 10, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], -1
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; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
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; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: call void @use(i1 true)
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; CHECK-NEXT: call void @use(i1 true)
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; CHECK-NEXT: br label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%precond = icmp sle i64 %end, 10
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br i1 %precond, label %loop, label %exit
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loop:
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%iv = phi i64 [ %iv.next, %loop.latch ], [ 10, %entry ]
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%iv.next = add i64 %iv, -1
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%cmp.i.not = icmp eq i64 %iv, %end
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br i1 %cmp.i.not, label %exit, label %loop.latch
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loop.latch:
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%cmp2 = icmp sgt i64 %iv, %end
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call void @use(i1 %cmp2)
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%cmp3 = icmp sle i64 %iv, 10
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call void @use(i1 %cmp3)
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br label %loop
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exit:
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ret void
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}
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define void @signed_iv_step_minus1_missing_precond(i64 %end) {
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; CHECK-LABEL: define void @signed_iv_step_minus1_missing_precond(
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; CHECK-SAME: i64 [[END:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[PRECOND:%.*]] = icmp sle i64 [[END]], 11
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; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 10, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], -1
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; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
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; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[IV]], [[END]]
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; CHECK-NEXT: call void @use(i1 [[CMP2]])
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; CHECK-NEXT: [[CMP3:%.*]] = icmp sle i64 [[IV]], 10
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; CHECK-NEXT: call void @use(i1 [[CMP3]])
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; CHECK-NEXT: br label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%precond = icmp sle i64 %end, 11
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br i1 %precond, label %loop, label %exit
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loop:
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%iv = phi i64 [ %iv.next, %loop.latch ], [ 10, %entry ]
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%iv.next = add i64 %iv, -1
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%cmp.i.not = icmp eq i64 %iv, %end
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br i1 %cmp.i.not, label %exit, label %loop.latch
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loop.latch:
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%cmp2 = icmp sgt i64 %iv, %end
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call void @use(i1 %cmp2)
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%cmp3 = icmp sle i64 %iv, 10
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call void @use(i1 %cmp3)
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br label %loop
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exit:
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ret void
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}
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