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bolt/deps/llvm-18.1.8/llvm/test/Transforms/ConstraintElimination/shl.ll
Sam Vervaeck 174b6f4d4e
Embed LLVM 18.1.8
2025-02-14 19:21:04 +01:00

1394 lines
50 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s
declare void @llvm.assume(i1)
define i1 @test_shl_const_nuw_unsigned_1(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: ret i1 true
;
entry:
%start.shl.4 = shl nuw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%t.1 = icmp ult i8 %start, %high
ret i1 %t.1
}
define i1 @test_shl_const_nuw_unsigned_2(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2
; CHECK-NEXT: ret i1 true
;
entry:
%start.shl.4 = shl nuw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nuw i8 %start, 2
%t = icmp ult i8 %start.shl.2, %high
ret i1 %t
}
define i1 @test_shl_const_nuw_unsigned_3(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: ret i1 true
;
entry:
%start.shl.4 = shl nuw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nuw i8 %start, 2
%start.add.1 = add nuw i8 %start, %start
%t = icmp ule i8 %start.add.1, %start.shl.2
ret i1 %t
}
define i1 @test_shl_const_nuw_unsigned_4(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[F:%.*]] = icmp ult i8 [[START_ADD_1]], [[START_SHL_2]]
; CHECK-NEXT: ret i1 [[F]]
;
entry:
%start.shl.4 = shl nuw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nuw i8 %start, 2
%start.add.1 = add nuw i8 %start, %start
%f = icmp ult i8 %start.add.1, %start.shl.2
ret i1 %f
}
define i1 @test_shl_const_nuw_unsigned_5(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: ret i1 true
;
entry:
%start.shl.4 = shl nuw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add nuw i8 %start, %start
%start.add.2 = add nuw i8 %start.add.1, %start.add.1
%t.4 = icmp ule i8 %start.add.2, %start.shl.4
ret i1 %t.4
}
define i1 @test_shl_const_nuw_unsigned_6(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[F_2:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[F_2]]
;
entry:
%start.shl.4 = shl nuw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add nuw i8 %start, %start
%start.add.2 = add nuw i8 %start.add.1, %start.add.1
%f.2 = icmp ult i8 %start.add.2, %start.shl.4
ret i1 %f.2
}
define i1 @test_shl_const_nuw_unsigned_7(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_7(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nuw i8 [[START_ADD_2]], 1
; CHECK-NEXT: [[F_3:%.*]] = icmp ule i8 [[START_ADD_2_1]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[F_3]]
;
entry:
%start.shl.4 = shl nuw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nuw i8 %start, 2
%start.add.1 = add nuw i8 %start, %start
%start.add.2 = add nuw i8 %start.add.1, %start.add.1
%start.add.2.1 = add nuw i8 %start.add.2, 1
%f.3 = icmp ule i8 %start.add.2.1, %start.shl.4
ret i1 %f.3
}
define i1 @test_shl_const_nuw_unsigned_8(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_8(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nuw i8 [[START_ADD_2]], 1
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START]], 3
; CHECK-NEXT: ret i1 true
;
entry:
%start.shl.4 = shl nuw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nuw i8 %start, 2
%start.add.1 = add nuw i8 %start, %start
%start.add.2 = add nuw i8 %start.add.1, %start.add.1
%start.add.2.1 = add nuw i8 %start.add.2, 1
%start.shl.3 = shl nuw i8 %start, 3
%t.5 = icmp ule i8 %start.add.1, %start.shl.3
ret i1 %t.5
}
define i1 @test_shl_const_nuw_unsigned_9(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_9(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nuw i8 [[START_ADD_2]], 1
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START]], 3
; CHECK-NEXT: [[F_5:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_3]]
; CHECK-NEXT: ret i1 [[F_5]]
;
entry:
%start.shl.4 = shl nuw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nuw i8 %start, 2
%start.add.1 = add nuw i8 %start, %start
%start.add.2 = add nuw i8 %start.add.1, %start.add.1
%start.add.2.1 = add nuw i8 %start.add.2, 1
%start.shl.3 = shl nuw i8 %start, 3
%f.5 = icmp ult i8 %start.add.2, %start.shl.3
ret i1 %f.5
}
define i1 @test_shl_const_nuw_unsigned_10(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_10(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nuw i8 [[START:%.*]], 5
; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START]], 3
; CHECK-NEXT: ret i1 true
;
entry:
%start.shl.5 = shl nuw i8 %start, 5
%c.0 = icmp ult i8 %start, %start.shl.5
call void @llvm.assume(i1 %c.0)
%start.shl.3 = shl nuw i8 %start, 3
%t.1 = icmp ule i8 %start.shl.3, %start.shl.5
ret i1 %t.1
}
define i1 @test_shl_const_nuw_unsigned_11(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_11(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nuw i8 [[START:%.*]], 5
; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START]], 3
; CHECK-NEXT: ret i1 false
;
entry:
%start.shl.5 = shl nuw i8 %start, 5
%c.0 = icmp ult i8 %start, %start.shl.5
call void @llvm.assume(i1 %c.0)
%start.shl.3 = shl nuw i8 %start, 3
%c.1 = icmp ule i8 %start.shl.5, %start.shl.3
ret i1 %c.1
}
define i1 @test_shl_const_nuw_unsigned_12(i8 %start) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_12(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START:%.*]], 3
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START]], [[START_SHL_3]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nuw i8 [[START]], 5
; CHECK-NEXT: ret i1 true
;
entry:
%start.shl.3 = shl nuw i8 %start, 3
%c.1 = icmp ult i8 %start, %start.shl.3
call void @llvm.assume(i1 %c.1)
%start.shl.5 = shl nuw i8 %start, 5
%t.1 = icmp ule i8 %start.shl.3, %start.shl.5
ret i1 %t.1
}
define i1 @test_shl_const_nuw_unsigned_13(i8 %start) {
; CHECK-LABEL: @test_shl_const_nuw_unsigned_13(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl i8 [[START:%.*]], 3
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START]], [[START_SHL_3]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_5:%.*]] = shl i8 [[START]], 5
; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_SHL_5]], [[START_SHL_3]]
; CHECK-NEXT: ret i1 [[F_1]]
;
entry:
%start.shl.3 = shl i8 %start, 3
%c.1 = icmp ult i8 %start, %start.shl.3
call void @llvm.assume(i1 %c.1)
%start.shl.5 = shl i8 %start, 5
%f.1 = icmp ule i8 %start.shl.5, %start.shl.3
ret i1 %f.1
}
define i1 @test_shl_add_const_nuw_unsigned_1(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: ret i1 true
;
entry:
%add = add nuw i8 %start, 3
%start.shl.4 = shl nuw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%t.1 = icmp ult i8 %start, %high
ret i1 %t.1
}
define i1 @test_shl_add_const_nuw_unsigned_2(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2
; CHECK-NEXT: ret i1 true
;
entry:
%add = add nuw i8 %start, 3
%start.shl.4 = shl nuw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nuw i8 %start, 2
%t.2 = icmp ult i8 %start.shl.2, %high
ret i1 %t.2
}
define i1 @test_shl_add_const_nuw_unsigned_3(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: ret i1 true
;
entry:
%add = add nuw i8 %start, 3
%start.shl.4 = shl nuw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add nuw i8 %start, %start
%start.add.2 = add nuw i8 %start.add.1, %start.add.1
%t.3 = icmp ule i8 %start.add.2, %start.shl.4
ret i1 %t.3
}
define i1 @test_shl_add_const_nuw_unsigned_4(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: ret i1 true
;
entry:
%add = add nuw i8 %start, 3
%start.shl.4 = shl nuw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nuw i8 %start, 2
%start.add.1 = add nuw i8 %start, %start
%start.add.2 = add nuw i8 %start.add.1, %start.add.1
%t.4 = icmp ult i8 %start.add.2, %start.shl.4
ret i1 %t.4
}
define i1 @test_shl_add_const_nuw_unsigned_5(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_12:%.*]] = add nuw i8 [[START_ADD_2]], 12
; CHECK-NEXT: ret i1 true
;
entry:
%add = add nuw i8 %start, 3
%start.shl.4 = shl nuw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add nuw i8 %start, %start
%start.add.2 = add nuw i8 %start.add.1, %start.add.1
%start.add.2.12 = add nuw i8 %start.add.2, 12
%t.5 = icmp ule i8 %start.add.2.12, %start.shl.4
ret i1 %t.5
}
define i1 @test_shl_add_const_nuw_unsigned_6(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_13:%.*]] = add nuw i8 [[START_ADD_2]], 13
; CHECK-NEXT: ret i1 true
;
entry:
%add = add nuw i8 %start, 3
%start.shl.4 = shl nuw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add nuw i8 %start, %start
%start.add.2 = add nuw i8 %start.add.1, %start.add.1
%start.add.2.13 = add nuw i8 %start.add.2, 13
%f.1 = icmp ule i8 %start.add.2.13, %start.shl.4
ret i1 %f.1
}
define i1 @test_shl_const_nsw_unsigned_1(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]]
; CHECK-NEXT: ret i1 [[T_1]]
;
entry:
%start.shl.4 = shl nsw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%t.1 = icmp ult i8 %start, %high
ret i1 %t.1
}
define i1 @test_shl_const_nsw_unsigned_2(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2
; CHECK-NEXT: [[T:%.*]] = icmp ult i8 [[START_SHL_2]], [[HIGH]]
; CHECK-NEXT: ret i1 [[T]]
;
entry:
%start.shl.4 = shl nsw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nsw i8 %start, 2
%t = icmp ult i8 %start.shl.2, %high
ret i1 %t
}
define i1 @test_shl_const_nsw_unsigned_3(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[T:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_SHL_2]]
; CHECK-NEXT: ret i1 [[T]]
;
entry:
%start.shl.4 = shl nsw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nsw i8 %start, 2
%start.add.1 = add nsw i8 %start, %start
%t = icmp ule i8 %start.add.1, %start.shl.2
ret i1 %t
}
define i1 @test_shl_const_nsw_unsigned_4(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[F:%.*]] = icmp ult i8 [[START_ADD_1]], [[START_SHL_2]]
; CHECK-NEXT: ret i1 [[F]]
;
entry:
%start.shl.4 = shl nsw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nsw i8 %start, 2
%start.add.1 = add nsw i8 %start, %start
%f = icmp ult i8 %start.add.1, %start.shl.2
ret i1 %f
}
define i1 @test_shl_const_nsw_unsigned_5(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[T_4:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[T_4]]
;
entry:
%start.shl.4 = shl nsw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add nsw i8 %start, %start
%start.add.2 = add nsw i8 %start.add.1, %start.add.1
%t.4 = icmp ule i8 %start.add.2, %start.shl.4
ret i1 %t.4
}
define i1 @test_shl_const_nsw_unsigned_6(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[F_2:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[F_2]]
;
entry:
%start.shl.4 = shl nsw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add nsw i8 %start, %start
%start.add.2 = add nsw i8 %start.add.1, %start.add.1
%f.2 = icmp ult i8 %start.add.2, %start.shl.4
ret i1 %f.2
}
define i1 @test_shl_const_nsw_unsigned_7(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_7(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nsw i8 [[START_ADD_2]], 1
; CHECK-NEXT: [[F_3:%.*]] = icmp ule i8 [[START_ADD_2_1]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[F_3]]
;
entry:
%start.shl.4 = shl nsw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nsw i8 %start, 2
%start.add.1 = add nsw i8 %start, %start
%start.add.2 = add nsw i8 %start.add.1, %start.add.1
%start.add.2.1 = add nsw i8 %start.add.2, 1
%f.3 = icmp ule i8 %start.add.2.1, %start.shl.4
ret i1 %f.3
}
define i1 @test_shl_const_nsw_unsigned_8(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_8(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nsw i8 [[START_ADD_2]], 1
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START]], 3
; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_SHL_3]]
; CHECK-NEXT: ret i1 [[T_5]]
;
entry:
%start.shl.4 = shl nsw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nsw i8 %start, 2
%start.add.1 = add nsw i8 %start, %start
%start.add.2 = add nsw i8 %start.add.1, %start.add.1
%start.add.2.1 = add nsw i8 %start.add.2, 1
%start.shl.3 = shl nsw i8 %start, 3
%t.5 = icmp ule i8 %start.add.1, %start.shl.3
ret i1 %t.5
}
define i1 @test_shl_const_nsw_unsigned_9(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_9(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nsw i8 [[START_ADD_2]], 1
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START]], 3
; CHECK-NEXT: [[F_5:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_3]]
; CHECK-NEXT: ret i1 [[F_5]]
;
entry:
%start.shl.4 = shl nsw i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nsw i8 %start, 2
%start.add.1 = add nsw i8 %start, %start
%start.add.2 = add nsw i8 %start.add.1, %start.add.1
%start.add.2.1 = add nsw i8 %start.add.2, 1
%start.shl.3 = shl nsw i8 %start, 3
%f.5 = icmp ult i8 %start.add.2, %start.shl.3
ret i1 %f.5
}
define i1 @test_shl_const_nsw_unsigned_10(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_10(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nsw i8 [[START:%.*]], 5
; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START]], 3
; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_SHL_3]], [[START_SHL_5]]
; CHECK-NEXT: ret i1 [[T_1]]
;
entry:
%start.shl.5 = shl nsw i8 %start, 5
%c.0 = icmp ult i8 %start, %start.shl.5
call void @llvm.assume(i1 %c.0)
%start.shl.3 = shl nsw i8 %start, 3
%t.1 = icmp ule i8 %start.shl.3, %start.shl.5
ret i1 %t.1
}
define i1 @test_shl_const_nsw_unsigned_11(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_nsw_unsigned_11(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nsw i8 [[START:%.*]], 5
; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START]], 3
; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_SHL_5]], [[START_SHL_3]]
; CHECK-NEXT: ret i1 [[C_1]]
;
entry:
%start.shl.5 = shl nsw i8 %start, 5
%c.0 = icmp ult i8 %start, %start.shl.5
call void @llvm.assume(i1 %c.0)
%start.shl.3 = shl nsw i8 %start, 3
%c.1 = icmp ule i8 %start.shl.5, %start.shl.3
ret i1 %c.1
}
define i1 @test_shl_add_const_nsw_unsigned_1(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]]
; CHECK-NEXT: ret i1 [[T_1]]
;
entry:
%add = add nsw i8 %start, 3
%start.shl.4 = shl nsw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%t.1 = icmp ult i8 %start, %high
ret i1 %t.1
}
define i1 @test_shl_add_const_nsw_unsigned_2(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2
; CHECK-NEXT: [[T_2:%.*]] = icmp ult i8 [[START_SHL_2]], [[HIGH]]
; CHECK-NEXT: ret i1 [[T_2]]
;
entry:
%add = add nsw i8 %start, 3
%start.shl.4 = shl nsw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nsw i8 %start, 2
%t.2 = icmp ult i8 %start.shl.2, %high
ret i1 %t.2
}
define i1 @test_shl_add_const_nsw_unsigned_3(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[T_3]]
;
entry:
%add = add nsw i8 %start, 3
%start.shl.4 = shl nsw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add nsw i8 %start, %start
%start.add.2 = add nsw i8 %start.add.1, %start.add.1
%t.3 = icmp ule i8 %start.add.2, %start.shl.4
ret i1 %t.3
}
define i1 @test_shl_add_const_nsw_unsigned_4(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[T_4:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[T_4]]
;
entry:
%add = add nsw i8 %start, 3
%start.shl.4 = shl nsw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl nsw i8 %start, 2
%start.add.1 = add nsw i8 %start, %start
%start.add.2 = add nsw i8 %start.add.1, %start.add.1
%t.4 = icmp ult i8 %start.add.2, %start.shl.4
ret i1 %t.4
}
define i1 @test_shl_add_const_nsw_unsigned_5(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_12:%.*]] = add nsw i8 [[START_ADD_2]], 12
; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_2_12]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[T_5]]
;
entry:
%add = add nsw i8 %start, 3
%start.shl.4 = shl nsw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add nsw i8 %start, %start
%start.add.2 = add nsw i8 %start.add.1, %start.add.1
%start.add.2.12 = add nsw i8 %start.add.2, 12
%t.5 = icmp ule i8 %start.add.2.12, %start.shl.4
ret i1 %t.5
}
define i1 @test_shl_add_const_nsw_unsigned_6(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_13:%.*]] = add nsw i8 [[START_ADD_2]], 13
; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_ADD_2_13]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[F_1]]
;
entry:
%add = add nsw i8 %start, 3
%start.shl.4 = shl nsw i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add nsw i8 %start, %start
%start.add.2 = add nsw i8 %start.add.1, %start.add.1
%start.add.2.13 = add nsw i8 %start.add.2, 13
%f.1 = icmp ule i8 %start.add.2.13, %start.shl.4
ret i1 %f.1
}
define i1 @test_shl_const_no_nuw_unsigned_1(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]]
; CHECK-NEXT: ret i1 [[T_1]]
;
entry:
%start.shl.4 = shl i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%t.1 = icmp ult i8 %start, %high
ret i1 %t.1
}
define i1 @test_shl_const_no_nuw_unsigned_2(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2
; CHECK-NEXT: [[T:%.*]] = icmp ult i8 [[START_SHL_2]], [[HIGH]]
; CHECK-NEXT: ret i1 [[T]]
;
entry:
%start.shl.4 = shl i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl i8 %start, 2
%t = icmp ult i8 %start.shl.2, %high
ret i1 %t
}
define i1 @test_shl_const_no_nuw_unsigned_3(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[T:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_SHL_2]]
; CHECK-NEXT: ret i1 [[T]]
;
entry:
%start.shl.4 = shl i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl i8 %start, 2
%start.add.1 = add i8 %start, %start
%t = icmp ule i8 %start.add.1, %start.shl.2
ret i1 %t
}
define i1 @test_shl_const_no_nuw_unsigned_4(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[F:%.*]] = icmp ult i8 [[START_ADD_1]], [[START_SHL_2]]
; CHECK-NEXT: ret i1 [[F]]
;
entry:
%start.shl.4 = shl i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl i8 %start, 2
%start.add.1 = add i8 %start, %start
%f = icmp ult i8 %start.add.1, %start.shl.2
ret i1 %f
}
define i1 @test_shl_const_no_nuw_unsigned_5(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[T_4:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[T_4]]
;
entry:
%start.shl.4 = shl i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add i8 %start, %start
%start.add.2 = add i8 %start.add.1, %start.add.1
%t.4 = icmp ule i8 %start.add.2, %start.shl.4
ret i1 %t.4
}
define i1 @test_shl_const_no_nuw_unsigned_6(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[F_2:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[F_2]]
;
entry:
%start.shl.4 = shl i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add i8 %start, %start
%start.add.2 = add i8 %start.add.1, %start.add.1
%f.2 = icmp ult i8 %start.add.2, %start.shl.4
ret i1 %f.2
}
define i1 @test_shl_const_no_nuw_unsigned_7(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_7(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add i8 [[START_ADD_2]], 1
; CHECK-NEXT: [[F_3:%.*]] = icmp ule i8 [[START_ADD_2_1]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[F_3]]
;
entry:
%start.shl.4 = shl i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl i8 %start, 2
%start.add.1 = add i8 %start, %start
%start.add.2 = add i8 %start.add.1, %start.add.1
%start.add.2.1 = add i8 %start.add.2, 1
%f.3 = icmp ule i8 %start.add.2.1, %start.shl.4
ret i1 %f.3
}
define i1 @test_shl_const_no_nuw_unsigned_8(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_8(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add i8 [[START_ADD_2]], 1
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl i8 [[START]], 3
; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_SHL_3]]
; CHECK-NEXT: ret i1 [[T_5]]
;
entry:
%start.shl.4 = shl i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl i8 %start, 2
%start.add.1 = add i8 %start, %start
%start.add.2 = add i8 %start.add.1, %start.add.1
%start.add.2.1 = add i8 %start.add.2, 1
%start.shl.3 = shl i8 %start, 3
%t.5 = icmp ule i8 %start.add.1, %start.shl.3
ret i1 %t.5
}
define i1 @test_shl_const_no_nuw_unsigned_9(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_9(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add i8 [[START_ADD_2]], 1
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl i8 [[START]], 3
; CHECK-NEXT: [[F_5:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_3]]
; CHECK-NEXT: ret i1 [[F_5]]
;
entry:
%start.shl.4 = shl i8 %start, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl i8 %start, 2
%start.add.1 = add i8 %start, %start
%start.add.2 = add i8 %start.add.1, %start.add.1
%start.add.2.1 = add i8 %start.add.2, 1
%start.shl.3 = shl i8 %start, 3
%f.5 = icmp ult i8 %start.add.2, %start.shl.3
ret i1 %f.5
}
define i1 @test_shl_const_no_nuw_unsigned_10(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_10(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_5:%.*]] = shl i8 [[START:%.*]], 5
; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl i8 [[START]], 3
; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_SHL_3]], [[START_SHL_5]]
; CHECK-NEXT: ret i1 [[T_1]]
;
entry:
%start.shl.5 = shl i8 %start, 5
%c.0 = icmp ult i8 %start, %start.shl.5
call void @llvm.assume(i1 %c.0)
%start.shl.3 = shl i8 %start, 3
%t.1 = icmp ule i8 %start.shl.3, %start.shl.5
ret i1 %t.1
}
define i1 @test_shl_const_no_nuw_unsigned_11(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_11(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[START_SHL_5:%.*]] = shl i8 [[START:%.*]], 5
; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl i8 [[START]], 3
; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_SHL_5]], [[START_SHL_3]]
; CHECK-NEXT: ret i1 [[C_1]]
;
entry:
%start.shl.5 = shl i8 %start, 5
%c.0 = icmp ult i8 %start, %start.shl.5
call void @llvm.assume(i1 %c.0)
%start.shl.3 = shl i8 %start, 3
%c.1 = icmp ule i8 %start.shl.5, %start.shl.3
ret i1 %c.1
}
define i1 @test_shl_add_const_no_nuw_unsigned_1(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]]
; CHECK-NEXT: ret i1 [[T_1]]
;
entry:
%add = add i8 %start, 3
%start.shl.4 = shl i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%t.1 = icmp ult i8 %start, %high
ret i1 %t.1
}
define i1 @test_shl_add_const_no_nuw_unsigned_2(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2
; CHECK-NEXT: [[T_2:%.*]] = icmp ult i8 [[START_SHL_2]], [[HIGH]]
; CHECK-NEXT: ret i1 [[T_2]]
;
entry:
%add = add i8 %start, 3
%start.shl.4 = shl i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl i8 %start, 2
%t.2 = icmp ult i8 %start.shl.2, %high
ret i1 %t.2
}
define i1 @test_shl_add_const_no_nuw_unsigned_3(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[T_3]]
;
entry:
%add = add i8 %start, 3
%start.shl.4 = shl i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add i8 %start, %start
%start.add.2 = add i8 %start.add.1, %start.add.1
%t.3 = icmp ule i8 %start.add.2, %start.shl.4
ret i1 %t.3
}
define i1 @test_shl_add_const_no_nuw_unsigned_4(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[T_4:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[T_4]]
;
entry:
%add = add i8 %start, 3
%start.shl.4 = shl i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.shl.2 = shl i8 %start, 2
%start.add.1 = add i8 %start, %start
%start.add.2 = add i8 %start.add.1, %start.add.1
%t.4 = icmp ult i8 %start.add.2, %start.shl.4
ret i1 %t.4
}
define i1 @test_shl_add_const_no_nuw_unsigned_5(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_12:%.*]] = add i8 [[START_ADD_2]], 12
; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_2_12]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[T_5]]
;
entry:
%add = add i8 %start, 3
%start.shl.4 = shl i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add i8 %start, %start
%start.add.2 = add i8 %start.add.1, %start.add.1
%start.add.2.12 = add i8 %start.add.2, 12
%t.5 = icmp ule i8 %start.add.2.12, %start.shl.4
ret i1 %t.5
}
define i1 @test_shl_add_const_no_nuw_unsigned_6(i8 %start, i8 %high) {
; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3
; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4
; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_13:%.*]] = add i8 [[START_ADD_2]], 13
; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_ADD_2_13]], [[START_SHL_4]]
; CHECK-NEXT: ret i1 [[F_1]]
;
entry:
%add = add i8 %start, 3
%start.shl.4 = shl i8 %add, 4
%c.1 = icmp ult i8 %start.shl.4, %high
call void @llvm.assume(i1 %c.1)
%start.add.1 = add i8 %start, %start
%start.add.2 = add i8 %start.add.1, %start.add.1
%start.add.2.13 = add i8 %start.add.2, 13
%f.1 = icmp ule i8 %start.add.2.13, %start.shl.4
ret i1 %f.1
}
define i1 @shl_overflow(i64 %start) {
; CHECK-LABEL: @shl_overflow(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[PRE_COND:%.*]] = icmp ugt i64 [[START:%.*]], 0
; CHECK-NEXT: br i1 [[PRE_COND]], label [[MAIN:%.*]], label [[EXIT:%.*]]
; CHECK: main:
; CHECK-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[START]], -1
; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[TMP0]], [[START]]
; CHECK-NEXT: ret i1 [[TMP1]]
; CHECK: exit:
; CHECK-NEXT: ret i1 false
;
entry:
%pre.cond = icmp ugt i64 %start, 0
br i1 %pre.cond, label %main, label %exit
main:
%0 = shl nuw nsw i64 %start, -1
%1 = icmp uge i64 %0, %start
ret i1 %1
exit:
ret i1 0
}
define i1 @shl_overflow_2() {
; CHECK-LABEL: @shl_overflow_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SHL_UB:%.*]] = shl nuw nsw i256 0, 64
; CHECK-NEXT: [[SHL_CMP:%.*]] = icmp uge i256 [[SHL_UB]], 0
; CHECK-NEXT: ret i1 [[SHL_CMP]]
;
entry:
%shl.ub = shl nuw nsw i256 0, 64
%shl.cmp = icmp uge i256 %shl.ub, 0
ret i1 %shl.cmp
}
define i1 @shl_overflow_3() {
; CHECK-LABEL: @shl_overflow_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SHL_UB:%.*]] = shl nuw nsw i256 0, 65
; CHECK-NEXT: [[SHL_CMP:%.*]] = icmp uge i256 [[SHL_UB]], 0
; CHECK-NEXT: ret i1 [[SHL_CMP]]
;
entry:
%shl.ub = shl nuw nsw i256 0, 65
%shl.cmp = icmp uge i256 %shl.ub, 0
ret i1 %shl.cmp
}
define i1 @shl_55() {
; CHECK-LABEL: @shl_55(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SHL_UB:%.*]] = shl nuw nsw i256 1, 55
; CHECK-NEXT: [[SHL_CMP:%.*]] = icmp uge i256 [[SHL_UB]], 1
; CHECK-NEXT: ret i1 [[SHL_CMP]]
;
entry:
%shl.ub = shl nuw nsw i256 1, 55
%shl.cmp = icmp uge i256 %shl.ub, 1
ret i1 %shl.cmp
}
define i1 @shl_nsw_x8_slt_x7(i8 %start, i8 %high) {
; CHECK-LABEL: @shl_nsw_x8_slt_x7(
; CHECK-NEXT: [[C_0:%.*]] = icmp sge i8 [[HIGH:%.*]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START:%.*]], 3
; CHECK-NEXT: [[C_1:%.*]] = icmp slt i8 [[START_SHL_3]], [[HIGH]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_MUL_7:%.*]] = mul nsw i8 [[START]], 7
; CHECK-NEXT: ret i1 true
;
%c.0 = icmp sge i8 %high, 0
call void @llvm.assume(i1 %c.0)
%start.shl.3 = shl nsw i8 %start, 3
%c.1 = icmp slt i8 %start.shl.3, %high
call void @llvm.assume(i1 %c.1)
%start.mul.7 = mul nsw i8 %start, 7
%t.1 = icmp slt i8 %start.mul.7, %high
ret i1 %t.1
}
define i1 @shl_nsw_x8_not_slt_x9(i8 %start, i8 %high) {
; CHECK-LABEL: @shl_nsw_x8_not_slt_x9(
; CHECK-NEXT: [[C_0:%.*]] = icmp sge i8 [[HIGH:%.*]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START:%.*]], 3
; CHECK-NEXT: [[C_1:%.*]] = icmp slt i8 [[START_SHL_3]], [[HIGH]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_MUL_9:%.*]] = mul nsw i8 [[START]], 9
; CHECK-NEXT: [[T_1:%.*]] = icmp slt i8 [[START_MUL_9]], [[HIGH]]
; CHECK-NEXT: ret i1 [[T_1]]
;
%c.0 = icmp sge i8 %high, 0
call void @llvm.assume(i1 %c.0)
%start.shl.3 = shl nsw i8 %start, 3
%c.1 = icmp slt i8 %start.shl.3, %high
call void @llvm.assume(i1 %c.1)
%start.mul.9 = mul nsw i8 %start, 9
%t.1 = icmp slt i8 %start.mul.9, %high
ret i1 %t.1
}
define i1 @shl_nsw_sign_implication(i8 %x) {
; CHECK-LABEL: @shl_nsw_sign_implication(
; CHECK-NEXT: [[SHL:%.*]] = shl nsw i8 [[X:%.*]], 2
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[X]], 0
; CHECK-NEXT: br i1 [[CMP1]], label [[IF:%.*]], label [[ELSE:%.*]]
; CHECK: if:
; CHECK-NEXT: ret i1 true
; CHECK: else:
; CHECK-NEXT: ret i1 true
;
%shl = shl nsw i8 %x, 2
%cmp1 = icmp slt i8 %x, 0
br i1 %cmp1, label %if, label %else
if:
%cmp2 = icmp slt i8 %shl, 0
ret i1 %cmp2
else:
%cmp3 = icmp sge i8 %shl, 0
ret i1 %cmp3
}
define i1 @shl_nsw_by_bw_minus_1(i64 %x) {
; CHECK-LABEL: @shl_nsw_by_bw_minus_1(
; CHECK-NEXT: [[X_SHL:%.*]] = shl nsw i64 [[X:%.*]], 63
; CHECK-NEXT: [[C_1:%.*]] = icmp slt i64 [[X_SHL]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[T_1:%.*]] = icmp slt i64 [[X]], 0
; CHECK-NEXT: ret i1 [[T_1]]
;
%x.shl = shl nsw i64 %x, 63
%c.1 = icmp slt i64 %x.shl, 0
call void @llvm.assume(i1 %c.1)
%t.1 = icmp slt i64 %x, 0
ret i1 %t.1
}
; Shift returns poison in this case, just make sure we don't crash.
define i1 @shl_nsw_by_bw(i64 %x) {
; CHECK-LABEL: @shl_nsw_by_bw(
; CHECK-NEXT: [[X_SHL:%.*]] = shl nsw i64 [[X:%.*]], 64
; CHECK-NEXT: [[C_1:%.*]] = icmp slt i64 [[X_SHL]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[T_1:%.*]] = icmp slt i64 [[X]], 0
; CHECK-NEXT: ret i1 [[T_1]]
;
%x.shl = shl nsw i64 %x, 64
%c.1 = icmp slt i64 %x.shl, 0
call void @llvm.assume(i1 %c.1)
%t.1 = icmp slt i64 %x, 0
ret i1 %t.1
}
; Shift returns poison in this case, just make sure we don't crash.
define i1 @shl_nsw_by_bw_plus_1(i64 %x) {
; CHECK-LABEL: @shl_nsw_by_bw_plus_1(
; CHECK-NEXT: [[X_SHL:%.*]] = shl nsw i64 [[X:%.*]], 65
; CHECK-NEXT: [[C_1:%.*]] = icmp slt i64 [[X_SHL]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[T_1:%.*]] = icmp slt i64 [[X]], 0
; CHECK-NEXT: ret i1 [[T_1]]
;
%x.shl = shl nsw i64 %x, 65
%c.1 = icmp slt i64 %x.shl, 0
call void @llvm.assume(i1 %c.1)
%t.1 = icmp slt i64 %x, 0
ret i1 %t.1
}
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