44 lines
1.3 KiB
C
44 lines
1.3 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
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// REQUIRES: riscv-registered-target
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// RUN: %clang_cc1 -triple riscv32 -O2 -emit-llvm %s -o - \
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// RUN: | FileCheck %s
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// RUN: %clang_cc1 -triple riscv64 -O2 -emit-llvm %s -o - \
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// RUN: | FileCheck %s
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// Test RISC-V specific clobbered registers in inline assembly.
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// CHECK-LABEL: define {{.*}} void @test_fflags
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// CHECK: tail call void asm sideeffect "", "~{fflags}"()
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void test_fflags(void) {
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asm volatile ("" :::"fflags");
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}
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// CHECK-LABEL: define {{.*}} void @test_frm
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// CHECK: tail call void asm sideeffect "", "~{frm}"()
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void test_frm(void) {
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asm volatile ("" :::"frm");
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}
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// CHECK-LABEL: define {{.*}} void @test_vtype
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// CHECK: tail call void asm sideeffect "", "~{vtype}"()
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void test_vtype(void) {
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asm volatile ("" :::"vtype");
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}
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// CHECK-LABEL: define {{.*}} void @test_vl
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// CHECK: tail call void asm sideeffect "", "~{vl}"()
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void test_vl(void) {
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asm volatile ("" :::"vl");
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}
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// CHECK-LABEL: define {{.*}} void @test_vxsat
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// CHECK: tail call void asm sideeffect "", "~{vxsat}"()
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void test_vxsat(void) {
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asm volatile ("" :::"vxsat");
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}
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// CHECK-LABEL: define {{.*}} void @test_vxrm
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// CHECK: tail call void asm sideeffect "", "~{vxrm}"()
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void test_vxrm(void) {
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asm volatile ("" :::"vxrm");
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}
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