53 lines
1.4 KiB
C
53 lines
1.4 KiB
C
// RUN: %clang_cc1 -triple aarch64-eabi -target-feature +v8a -verify -S %s -o -
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// REQUIRES: aarch64-registered-target
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#include <arm_neon.h>
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__attribute__((target("+crypto")))
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void test_crypto(uint8x16_t data, uint8x16_t key)
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{
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vaeseq_u8(data, key);
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vsha1su1q_u32(data, key);
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}
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__attribute__((target("crypto")))
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void test_pluscrypto(uint8x16_t data, uint8x16_t key)
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{
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vaeseq_u8(data, key);
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vsha1su1q_u32(data, key);
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}
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__attribute__((target("arch=armv8.2-a+crypto")))
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void test_archcrypto(uint8x16_t data, uint8x16_t key)
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{
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vaeseq_u8(data, key);
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vsha1su1q_u32(data, key);
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}
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// FIXME: This shouldn't need +crypto to be consistent with -mcpu options.
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__attribute__((target("cpu=cortex-a55+crypto")))
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void test_a55crypto(uint8x16_t data, uint8x16_t key)
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{
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vaeseq_u8(data, key);
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vsha1su1q_u32(data, key);
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}
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__attribute__((target("cpu=cortex-a510+crypto")))
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void test_a510crypto(uint8x16_t data, uint8x16_t key)
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{
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vaeseq_u8(data, key);
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vsha1su1q_u32(data, key);
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}
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__attribute__((target("+sha2+aes")))
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void test_sha2aes(uint8x16_t data, uint8x16_t key)
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{
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vaeseq_u8(data, key);
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vsha1su1q_u32(data, key);
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}
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void test_errors(uint8x16_t data, uint8x16_t key)
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{
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vaeseq_u8(data, key); // expected-error {{always_inline function 'vaeseq_u8' requires target feature 'aes'}}
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vsha1su1q_u32(data, key); // expected-error {{always_inline function 'vsha1su1q_u32' requires target feature 'sha2'}}
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}
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