81 lines
3.3 KiB
C++
81 lines
3.3 KiB
C++
//===- AArch64GlobalISelUtils.h ----------------------------------*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file APIs for AArch64-specific helper functions used in the GlobalISel
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/// pipeline.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AARCH64_GISEL_AARCH64GLOBALISELUTILS_H
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#define LLVM_LIB_TARGET_AARCH64_GISEL_AARCH64GLOBALISELUTILS_H
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#include "MCTargetDesc/AArch64AddressingModes.h"
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#include "Utils/AArch64BaseInfo.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/GlobalISel/Utils.h"
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#include "llvm/CodeGen/Register.h"
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#include "llvm/IR/InstrTypes.h"
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#include <cstdint>
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namespace llvm {
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namespace AArch64GISelUtils {
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/// \returns true if \p C is a legal immediate operand for an arithmetic
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/// instruction.
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constexpr bool isLegalArithImmed(const uint64_t C) {
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return (C >> 12 == 0) || ((C & 0xFFFULL) == 0 && C >> 24 == 0);
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}
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/// \returns A value when \p MI is a vector splat of a Register or constant.
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/// Checks for generic opcodes and AArch64-specific generic opcodes.
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std::optional<RegOrConstant>
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getAArch64VectorSplat(const MachineInstr &MI, const MachineRegisterInfo &MRI);
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/// \returns A value when \p MI is a constant vector splat.
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/// Checks for generic opcodes and AArch64-specific generic opcodes.
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std::optional<int64_t>
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getAArch64VectorSplatScalar(const MachineInstr &MI,
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const MachineRegisterInfo &MRI);
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/// \returns true if \p MaybeSub and \p Pred are part of a CMN tree for an
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/// integer compare.
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bool isCMN(const MachineInstr *MaybeSub, const CmpInst::Predicate &Pred,
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const MachineRegisterInfo &MRI);
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/// Replace a G_MEMSET with a value of 0 with a G_BZERO instruction if it is
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/// supported and beneficial to do so.
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///
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/// \note This only applies on Darwin.
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///
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/// \returns true if \p MI was replaced with a G_BZERO.
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bool tryEmitBZero(MachineInstr &MI, MachineIRBuilder &MIRBuilder, bool MinSize);
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/// Find the AArch64 condition codes necessary to represent \p P for a scalar
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/// floating point comparison.
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///
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/// \param [out] CondCode is the first condition code.
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/// \param [out] CondCode2 is the second condition code if necessary.
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/// AArch64CC::AL otherwise.
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void changeFCMPPredToAArch64CC(const CmpInst::Predicate P,
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AArch64CC::CondCode &CondCode,
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AArch64CC::CondCode &CondCode2);
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/// Find the AArch64 condition codes necessary to represent \p P for a vector
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/// floating point comparison.
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///
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/// \param [out] CondCode - The first condition code.
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/// \param [out] CondCode2 - The second condition code if necessary.
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/// AArch64CC::AL otherwise.
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/// \param [out] Invert - True if the comparison must be inverted with a NOT.
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void changeVectorFCMPPredToAArch64CC(const CmpInst::Predicate P,
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AArch64CC::CondCode &CondCode,
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AArch64CC::CondCode &CondCode2,
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bool &Invert);
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} // namespace AArch64GISelUtils
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} // namespace llvm
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#endif
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