91 lines
3.3 KiB
C++
91 lines
3.3 KiB
C++
//===-- LoongArchSubtarget.cpp - LoongArch Subtarget Information -*- C++ -*--=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LoongArch specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "LoongArchSubtarget.h"
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#include "LoongArchFrameLowering.h"
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#include "MCTargetDesc/LoongArchBaseInfo.h"
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using namespace llvm;
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#define DEBUG_TYPE "loongarch-subtarget"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "LoongArchGenSubtargetInfo.inc"
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void LoongArchSubtarget::anchor() {}
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LoongArchSubtarget &LoongArchSubtarget::initializeSubtargetDependencies(
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const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS,
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StringRef ABIName) {
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bool Is64Bit = TT.isArch64Bit();
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if (CPU.empty() || CPU == "generic")
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CPU = Is64Bit ? "generic-la64" : "generic-la32";
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if (TuneCPU.empty())
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TuneCPU = CPU;
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ParseSubtargetFeatures(CPU, TuneCPU, FS);
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initializeProperties(TuneCPU);
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if (Is64Bit) {
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GRLenVT = MVT::i64;
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GRLen = 64;
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}
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if (HasLA32 == HasLA64)
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report_fatal_error("Please use one feature of 32bit and 64bit.");
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if (Is64Bit && HasLA32)
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report_fatal_error("Feature 32bit should be used for loongarch32 target.");
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if (!Is64Bit && HasLA64)
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report_fatal_error("Feature 64bit should be used for loongarch64 target.");
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TargetABI = LoongArchABI::computeTargetABI(TT, ABIName);
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return *this;
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}
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void LoongArchSubtarget::initializeProperties(StringRef TuneCPU) {
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// Initialize CPU specific properties. We should add a tablegen feature for
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// this in the future so we can specify it together with the subtarget
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// features.
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// TODO: Check TuneCPU and override defaults (that are for LA464) once we
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// support optimizing for more uarchs.
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// Default to the alignment settings empirically confirmed to perform best
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// on LA464, with 4-wide instruction fetch and decode stages. These settings
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// can also be overridden in initializeProperties.
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//
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// We default to such higher-than-minimum alignments because we assume that:
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//
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// * these settings should benefit most existing uarchs/users,
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// * future general-purpose LoongArch cores are likely to have issue widths
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// equal to or wider than 4,
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// * instruction sequences best for LA464 should not pessimize other future
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// uarchs, and
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// * narrower cores would not suffer much (aside from slightly increased
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// ICache footprint maybe), compared to the gains everywhere else.
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PrefFunctionAlignment = Align(32);
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PrefLoopAlignment = Align(16);
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MaxBytesForAlignment = 16;
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}
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LoongArchSubtarget::LoongArchSubtarget(const Triple &TT, StringRef CPU,
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StringRef TuneCPU, StringRef FS,
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StringRef ABIName,
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const TargetMachine &TM)
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: LoongArchGenSubtargetInfo(TT, CPU, TuneCPU, FS),
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FrameLowering(
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initializeSubtargetDependencies(TT, CPU, TuneCPU, FS, ABIName)),
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InstrInfo(*this), RegInfo(getHwMode()), TLInfo(TM, *this) {}
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